cvt_V1724.h File Reference

V1724 VME board definitions. More...

#include "cvt_common_defs.h"
#include "cvt_board_commons.h"

Go to the source code of this file.

Data Structures
struct	cvt_V1724_data
	V1724 board data structure. More...
struct	CVT_V1724_ROM_CONFIG
	V1724 board ROM configuration. More...
union	PACKED_1
Defines
#define	CVT_V1724_THRESHOLD_NUM   8
	Number of threshold registers.
#define	CVT_V1724_OUT_BUFFER_ADD   0x0000
	Output buffer relative address.
#define	CVT_V1724_BROAD_CH_CTRL_ADD   0x8000
	Control channel broadcast register relative address (Write only).
#define	CVT_V1724_BROAD_CH_SET_CTRL_ADD   0x8004
	Set control channel broadcast register relative address (Write only).
#define	CVT_V1724_BROAD_CH_CLEAR_CTRL_ADD   0x8008
	Clear control channel broadcast register relative address (Write only).
#define	CVT_V1724_BROAD_CH_BUFF_SIZE_ADD   0x800C
	Buffer size channel broadcast register relative address (Write only).
#define	CVT_V1724_BROAD_CH_BUFF_FLUSH_ADD   0x8010
	Number of buffers to be removed channel broadcast register relative address (Write only).
#define	CVT_V1724_BROAD_CH_RND_ACC_ADD   0x8014
	Read random Access channel broadcast register relative address (Write only).
#define	CVT_V1724_ACQ_CONTROL_ADD   0x8100
	Acquisiton Control register relative address.
#define	CVT_V1724_ACQ_STATUS_ADD   0x8104
	Acquisiton Status register relative address.
#define	CVT_V1724_SW_TRIGGER_ADD   0x8108
	Software trigger register relative address.
#define	CVT_V1724_TRIGGER_SRC_ENABLE_ADD   0x810C
	Trigger source enable register relative address.
#define	CVT_V1724_FP_TRIGGER_OUT_ENABLE_ADD   0x8110
	Front panel trigger out enable mask register relative address.
#define	CVT_V1724_POST_TRIG_ADD   0x8114
	Post trigger register relative address.
#define	CVT_V1724_FRONT_PANEL_IO_ADD   0x8118
	Front panel IO register relative address.
#define	CVT_V1724_FRONT_PANEL_IO_CTRL_ADD   0x811C
	Front panel IO Control register relative address.
#define	CVT_V1724_CH_ENABLE_ADD   0x8120
	Channel enable mask register relative address.
#define	CVT_V1724_FW_REV_ADD   0x8124
	Firmware Revision register relative address.
#define	CVT_V1724_DOWNSAMPLE_FACT_ADD   0x8128
	DownSample factor register relative address.
#define	CVT_V1724_EVENT_STORED_ADD   0x812C
	Event stored register relative address.
#define	CVT_V1724_VME_CONTROL_ADD   0xEF00
	VME Control register relative address.
#define	CVT_V1724_VME_STATUS_ADD   0xEF04
	VME Status register relative address.
#define	CVT_V1724_BOARD_ID_ADD   0xEF08
	Geo Address register relative address.
#define	CVT_V1724_MCST_CBLT_ADD_CTRL_ADD   0xEF0C
	MCST/CBLT Address and control register relative address.
#define	CVT_V1724_RELOCATION_ADDRESS_ADD   0xEF10
	Relocation address register relative address.
#define	CVT_V1724_INT_STATUS_ID_ADD   0xEF14
	Interrupt status id register relative address.
#define	CVT_V1724_INT_EVENT_NUM_ADD   0xEF18
	Interrupt event number register relative address.
#define	CVT_V1724_BLT_EVENT_NUM_ADD   0xEF1C
	BLT event number register relative address.
#define	CVT_V1724_SCRATCH_ADD   0xEF20
	Scratch register relative address.
#define	CVT_V1724_SW_RESET_ADD   0xEF24
	Software reset register relative address.
#define	CVT_V1724_SW_CLEAR_ADD   0xEF28
	Software clear register relative address.
#define	CVT_V1724_FLASH_EN_ADD   0xEF2C
	Flash enable relative address.
#define	CVT_V1724_FLASH_DATA_ADD   0xEF30
	Flash data relative address.
#define	CVT_V1724_RELOAD_CONFIG_ADD   0xEF34
	Configuration Reload relative address.
#define	CVT_V1724_BASE_ADDRESS_ADD   0xEF38
	Base Address relative address.
#define	CVT_V1724_ROM_CHKSUM_ADD   0xF000
	Configuration ROM checksum relative address.
#define	CVT_V1724_ROM_CHKSUM_LEN_2_ADD   0xF004
	Configuration ROM checksum length (MSB) relative address.
#define	CVT_V1724_ROM_CHKSUM_LEN_1_ADD   0xF008
	Configuration ROM checksum length relative address.
#define	CVT_V1724_ROM_CHKSUM_LEN_0_ADD   0xF00C
	Configuration ROM checksum length (LSB) relative address.
#define	CVT_V1724_ROM_CONST_2_ADD   0xF010
	Configuration ROM constant (MSB) relative address.
#define	CVT_V1724_ROM_CONST_1_ADD   0xF014
	Configuration ROM constant relative address.
#define	CVT_V1724_ROM_CONST_0_ADD   0xF018
	Configuration ROM constant (LSB) relative address.
#define	CVT_V1724_ROM_C_CODE_ADD   0xF01C
	Configuration ROM c_code relative address.
#define	CVT_V1724_ROM_R_CODE_ADD   0xF020
	Configuration ROM r_code relative address.
#define	CVT_V1724_ROM_OUI_2_ADD   0xF024
	Configuration ROM Manufacturer identifier (IEEE OUI) (MSB) relative address.
#define	CVT_V1724_ROM_OUI_1_ADD   0xF028
	Configuration ROM Manufacturer identifier (IEEE OUI) relative address.
#define	CVT_V1724_ROM_OUI_0_ADD   0xF02C
	Configuration ROM Manufacturer identifier (IEEE OUI) (LSB) relative address.
#define	CVT_V1724_ROM_VERSION_ADD   0xF030
	Configuration ROM Purchased version of the Mod.V1724 relative address.
#define	CVT_V1724_ROM_BOARD_ID_2_ADD   0xF034
	Configuration ROM Board identifier (MSB) relative address.
#define	CVT_V1724_ROM_BOARD_ID_1_ADD   0xF038
	Configuration ROM Board identifier relative address.
#define	CVT_V1724_ROM_BOARD_ID_0_ADD   0xF03C
	Configuration ROM Board identifier (LSB) relative address.
#define	CVT_V1724_ROM_REVISION_3_ADD   0xF040
	Configuration ROM Hardware revision identifier relative address.
#define	CVT_V1724_ROM_REVISION_2_ADD   0xF044
	Configuration ROM Hardware revision identifier relative address.
#define	CVT_V1724_ROM_REVISION_1_ADD   0xF048
	Configuration ROM Hardware revision identifier relative address.
#define	CVT_V1724_ROM_REVISION_0_ADD   0xF04C
	Configuration ROM Hardware revision identifier relative address.
#define	CVT_V1724_ROM_SERIAL_1_ADD   0xF080
	Configuration ROM Serial number (MSB) relative address.
#define	CVT_V1724_ROM_SERIAL_0_ADD   0xF084
	Configuration ROM Serial number (LSB) relative address.
#define	CVT_V1724_CH0_RESERVED_RND_ACC_ADD   0x1014
	CH 0 Read Block channel broadcast reserved register relative address.
#define	CVT_V1724_CH0_THRESHOLD_ADD   0x1080
	CH 0 Threshold register relative address.
#define	CVT_V1724_CH0_TIME_OVER_UNDER_THR_ADD   0x1084
	CH 0 Over/Under Threshold Samples register relative address.
#define	CVT_V1724_CH0_STATUS_ADD   0x1088
	CH 0 status register relative address.
#define	CVT_V1724_CH0_FW_REV_ADD   0x108C
	CH 0 firmware revision register relative address.
#define	CVT_V1724_CH0_BUFF_OCCUPANCY_ADD   0x1094
	CH 0 Number of Buffers Filled register relative address.
#define	CVT_V1724_CH0_DAC_CONF_ADD   0x1098
	CH 0 DAC Data Configuration register relative address.
#define	CVT_V1724_CH0_ADC_CONF_ADD   0x109C
	CH 0 Configuration register relative address.
#define	CVT_V1724_CH0_RESERVED_ADC_DEBUG_ADD   0x10A0
	CH 0 ADC Debug Reserved register relative address.
#define	CVT_V1724_CH0_RESERVED_MEM_DATA_ADD   0x10A4
	CH 0 Memory test data Reserved register relative address.
#define	CVT_V1724_CH0_RESERVED_MEM_ADDRESS_ADD   0x10A8
	CH 0 Memory test address Reserved register relative address.
#define	CVT_V1724_CH1_RESERVED_RND_ACC_ADD   0x1114
	CH 1 Read Block channel broadcast reserved register relative address.
#define	CVT_V1724_CH1_THRESHOLD_ADD   0x1180
	CH 1 Threshold register relative address.
#define	CVT_V1724_CH1_TIME_OVER_UNDER_THR_ADD   0x1184
	CH 1 Over/Under Threshold Samples register relative address.
#define	CVT_V1724_CH1_STATUS_ADD   0x1188
	CH 1 status register relative address.
#define	CVT_V1724_CH1_FW_REV_ADD   0x118C
	CH 1 firmware revision register relative address.
#define	CVT_V1724_CH1_BUFF_OCCUPANCY_ADD   0x1194
	CH 1 Number of Buffers Filled register relative address.
#define	CVT_V1724_CH1_DAC_CONF_ADD   0x1198
	CH 1 DAC Data Configuration register relative address.
#define	CVT_V1724_CH1_ADC_CONF_ADD   0x119C
	CH 1 Configuration register relative address.
#define	CVT_V1724_CH1_RESERVED_ADC_DEBUG_ADD   0x11A0
	CH 1 ADC Debug Reserved register relative address.
#define	CVT_V1724_CH1_RESERVED_MEM_DATA_ADD   0x11A4
	CH 1 Memory test data Reserved register relative address.
#define	CVT_V1724_CH1_RESERVED_MEM_ADDRESS_ADD   0x11A8
	CH 1 Memory test address Reserved register relative address.
#define	CVT_V1724_CH2_RESERVED_RND_ACC_ADD   0x1214
	CH 2 Read Block channel broadcast reserved register relative address.
#define	CVT_V1724_CH2_THRESHOLD_ADD   0x1280
	CH 2 Threshold register relative address.
#define	CVT_V1724_CH2_TIME_OVER_UNDER_THR_ADD   0x1284
	CH 2 Over/Under Threshold Samples register relative address.
#define	CVT_V1724_CH2_STATUS_ADD   0x1288
	CH 2 status register relative address.
#define	CVT_V1724_CH2_FW_REV_ADD   0x128C
	CH 2 firmware revision register relative address.
#define	CVT_V1724_CH2_BUFF_OCCUPANCY_ADD   0x1294
	CH 2 Number of Buffers Filled register relative address.
#define	CVT_V1724_CH2_DAC_CONF_ADD   0x1298
	CH 2 DAC Data Configuration register relative address.
#define	CVT_V1724_CH2_ADC_CONF_ADD   0x129C
	CH 2 Configuration register relative address.
#define	CVT_V1724_CH2_RESERVED_ADC_DEBUG_ADD   0x12A0
	CH 2 ADC Debug Reserved register relative address.
#define	CVT_V1724_CH2_RESERVED_MEM_DATA_ADD   0x12A4
	CH 2 Memory test data Reserved register relative address.
#define	CVT_V1724_CH2_RESERVED_MEM_ADDRESS_ADD   0x12A8
	CH 2 Memory test address Reserved register relative address.
#define	CVT_V1724_CH3_RESERVED_RND_ACC_ADD   0x1314
	CH 3 Read Block channel broadcast reserved register relative address.
#define	CVT_V1724_CH3_THRESHOLD_ADD   0x1380
	CH 3 Threshold register relative address.
#define	CVT_V1724_CH3_TIME_OVER_UNDER_THR_ADD   0x1384
	CH 3 Over/Under Threshold Samples register relative address.
#define	CVT_V1724_CH3_STATUS_ADD   0x1388
	CH 3 status register relative address.
#define	CVT_V1724_CH3_FW_REV_ADD   0x138C
	CH 3 firmware revision register relative address.
#define	CVT_V1724_CH3_BUFF_OCCUPANCY_ADD   0x1394
	CH 3 Number of Buffers Filled register relative address.
#define	CVT_V1724_CH3_DAC_CONF_ADD   0x1398
	CH 3 DAC Data Configuration register relative address.
#define	CVT_V1724_CH3_ADC_CONF_ADD   0x139C
	CH 3 Configuration register relative address.
#define	CVT_V1724_CH3_RESERVED_ADC_DEBUG_ADD   0x13A0
	CH 3 ADC Debug Reserved register relative address.
#define	CVT_V1724_CH3_RESERVED_MEM_DATA_ADD   0x13A4
	CH 3 Memory test data Reserved register relative address.
#define	CVT_V1724_CH3_RESERVED_MEM_ADDRESS_ADD   0x13A8
	CH 3 Memory test address Reserved register relative address.
#define	CVT_V1724_CH4_RESERVED_RND_ACC_ADD   0x1414
	CH 4 Read Block channel broadcast reserved register relative address.
#define	CVT_V1724_CH4_THRESHOLD_ADD   0x1480
	CH 4 Threshold register relative address.
#define	CVT_V1724_CH4_TIME_OVER_UNDER_THR_ADD   0x1484
	CH 4 Over/Under Threshold Samples register relative address.
#define	CVT_V1724_CH4_STATUS_ADD   0x1488
	CH 4 status register relative address.
#define	CVT_V1724_CH4_FW_REV_ADD   0x148C
	CH 4 firmware revision register relative address.
#define	CVT_V1724_CH4_BUFF_OCCUPANCY_ADD   0x1494
	CH 4 Number of Buffers Filled register relative address.
#define	CVT_V1724_CH4_DAC_CONF_ADD   0x1498
	CH 4 DAC Data Configuration register relative address.
#define	CVT_V1724_CH4_ADC_CONF_ADD   0x149C
	CH 4 Configuration register relative address.
#define	CVT_V1724_CH4_RESERVED_ADC_DEBUG_ADD   0x14A0
	CH 4 ADC Debug Reserved register relative address.
#define	CVT_V1724_CH4_RESERVED_MEM_DATA_ADD   0x14A4
	CH 4 Memory test data Reserved register relative address.
#define	CVT_V1724_CH4_RESERVED_MEM_ADDRESS_ADD   0x14A8
	CH 4 Memory test address Reserved register relative address.
#define	CVT_V1724_CH5_RESERVED_RND_ACC_ADD   0x1514
	CH 5 Read Block channel broadcast reserved register relative address.
#define	CVT_V1724_CH5_THRESHOLD_ADD   0x1580
	CH 5 Threshold register relative address.
#define	CVT_V1724_CH5_TIME_OVER_UNDER_THR_ADD   0x1584
	CH 5 Over/Under Threshold Samples register relative address.
#define	CVT_V1724_CH5_STATUS_ADD   0x1588
	CH 5 status register relative address.
#define	CVT_V1724_CH5_FW_REV_ADD   0x158C
	CH 5 firmware revision register relative address.
#define	CVT_V1724_CH5_BUFF_OCCUPANCY_ADD   0x1594
	CH 5 Number of Buffers Filled register relative address.
#define	CVT_V1724_CH5_DAC_CONF_ADD   0x1598
	CH 5 DAC Data Configuration register relative address.
#define	CVT_V1724_CH5_ADC_CONF_ADD   0x159C
	CH 5 Configuration register relative address.
#define	CVT_V1724_CH5_RESERVED_ADC_DEBUG_ADD   0x15A0
	CH 5 ADC Debug Reserved register relative address.
#define	CVT_V1724_CH5_RESERVED_MEM_DATA_ADD   0x15A4
	CH 5 Memory test data Reserved register relative address.
#define	CVT_V1724_CH5_RESERVED_MEM_ADDRESS_ADD   0x15A8
	CH 5 Memory test address Reserved register relative address.
#define	CVT_V1724_CH6_RESERVED_RND_ACC_ADD   0x1614
	CH 6 Read Block channel broadcast reserved register relative address.
#define	CVT_V1724_CH6_THRESHOLD_ADD   0x1680
	CH 6 Threshold register relative address.
#define	CVT_V1724_CH6_TIME_OVER_UNDER_THR_ADD   0x1684
	CH 6 Over/Under Threshold Samples register relative address.
#define	CVT_V1724_CH6_STATUS_ADD   0x1688
	CH 6 status register relative address.
#define	CVT_V1724_CH6_FW_REV_ADD   0x168C
	CH 6 firmware revision register relative address.
#define	CVT_V1724_CH6_BUFF_OCCUPANCY_ADD   0x1694
	CH 6 Number of Buffers Filled register relative address.
#define	CVT_V1724_CH6_DAC_CONF_ADD   0x1698
	CH 6 DAC Data Configuration register relative address.
#define	CVT_V1724_CH6_ADC_CONF_ADD   0x169C
	CH 6 Configuration register relative address.
#define	CVT_V1724_CH6_RESERVED_ADC_DEBUG_ADD   0x16A0
	CH 6 ADC Debug Reserved register relative address.
#define	CVT_V1724_CH6_RESERVED_MEM_DATA_ADD   0x16A4
	CH 6 Memory test data Reserved register relative address.
#define	CVT_V1724_CH6_RESERVED_MEM_ADDRESS_ADD   0x16A8
	CH 6 Memory test address Reserved register relative address.
#define	CVT_V1724_CH7_RESERVED_RND_ACC_ADD   0x1714
	CH 7 Read Block channel broadcast reserved register relative address.
#define	CVT_V1724_CH7_THRESHOLD_ADD   0x1780
	CH 7 Threshold register relative address.
#define	CVT_V1724_CH7_TIME_OVER_UNDER_THR_ADD   0x1784
	CH 7 Over/Under Threshold Samples register relative address.
#define	CVT_V1724_CH7_STATUS_ADD   0x1788
	CH 7 status register relative address.
#define	CVT_V1724_CH7_FW_REV_ADD   0x178C
	CH 7 firmware revision register relative address.
#define	CVT_V1724_CH7_BUFF_OCCUPANCY_ADD   0x1794
	CH 7 Number of Buffers Filled register relative address.
#define	CVT_V1724_CH7_DAC_CONF_ADD   0x1798
	CH 7 DAC Data Configuration register relative address.
#define	CVT_V1724_CH7_ADC_CONF_ADD   0x179C
	CH 7 Configuration register relative address.
#define	CVT_V1724_CH7_RESERVED_ADC_DEBUG_ADD   0x17A0
	CH 7 ADC Debug Reserved register relative address.
#define	CVT_V1724_CH7_RESERVED_MEM_DATA_ADD   0x17A4
	CH 7 Memory test data Reserved register relative address.
#define	CVT_V1724_CH7_RESERVED_MEM_ADDRESS_ADD   0x17A8
	CH 7 Memory test address Reserved register relative address.
#define	CVT_V1724_OUT_BUFFER_DATA_SIZE   cvD64
	Output buffer data buffer.
#define	CVT_V1724_BROAD_CH_CTRL_DATA_SIZE   cvD32
	Control channel broadcast register data size (Write only).
#define	CVT_V1724_BROAD_CH_SET_CTRL_DATA_SIZE   cvD32
	Set control channel broadcast register data size (Write only).
#define	CVT_V1724_BROAD_CH_CLEAR_CTRL_DATA_SIZE   cvD32
	Clear control channel broadcast register data size (Write only).
#define	CVT_V1724_BROAD_CH_BUFF_SIZE_DATA_SIZE   cvD32
	Buffer size channel broadcast register data size(Write only).
#define	CVT_V1724_BROAD_CH_BUFF_FLUSH_DATA_SIZE   cvD32
	Number of buffers to be removed channel broadcast register data size(Write only).
#define	CVT_V1724_BROAD_CH_RND_ACC_DATA_SIZE   cvD32
	Parameters to Random access channel broadcast register data size (Write only).
#define	CVT_V1724_ACQ_CONTROL_DATA_SIZE   cvD32
	Acquisiton Control register data size.
#define	CVT_V1724_ACQ_STATUS_DATA_SIZE   cvD32
	Acquisiton Status register data size.
#define	CVT_V1724_SW_TRIGGER_DATA_SIZE   cvD32
	Software trigger register data size.
#define	CVT_V1724_TRIGGER_SRC_ENABLE_DATA_SIZE   cvD32
	Trigger source enable register data size.
#define	CVT_V1724_FP_TRIGGER_OUT_ENABLE_DATA_SIZE   cvD32
	Front panel trigger out enable mask register data size.
#define	CVT_V1724_POST_TRIG_DATA_SIZE   cvD32
	Post trigger register data size.
#define	CVT_V1724_FRONT_PANEL_IO_DATA_SIZE   cvD32
	Front panel IO register data size.
#define	CVT_V1724_FRONT_PANEL_IO_CTRL_DATA_SIZE   cvD32
	Front panel IO Control register data size.
#define	CVT_V1724_CH_ENABLE_DATA_SIZE   cvD32
	Channel enable mask register data size.
#define	CVT_V1724_FW_REV_DATA_SIZE   cvD32
	Firmware Revision register data size.
#define	CVT_V1724_DOWNSAMPLE_FACT_DATA_SIZE   cvD32
	DownSample factor register data size.
#define	CVT_V1724_EVENT_STORED_DATA_SIZE   cvD32
	Event stored register data size.
#define	CVT_V1724_VME_CONTROL_DATA_SIZE   cvD32
	VME Control register data size.
#define	CVT_V1724_VME_STATUS_DATA_SIZE   cvD32
	VME Status register data size.
#define	CVT_V1724_BOARD_ID_DATA_SIZE   cvD32
	Geo Address register data size.
#define	CVT_V1724_MCST_CBLT_ADD_CTRL_DATA_SIZE   cvD32
	MCST/CBLT Address and control register data size.
#define	CVT_V1724_RELOCATION_ADDRESS_DATA_SIZE   cvD32
	Relocation address register data size.
#define	CVT_V1724_INT_STATUS_ID_DATA_SIZE   cvD32
	Interrupt status id register data size.
#define	CVT_V1724_INT_EVENT_NUM_DATA_SIZE   cvD32
	Interrupt event number register data size.
#define	CVT_V1724_BLT_EVENT_NUM_DATA_SIZE   cvD32
	BLT event number register data size.
#define	CVT_V1724_SCRATCH_DATA_SIZE   cvD32
	Scratch register data size.
#define	CVT_V1724_SW_RESET_DATA_SIZE   cvD32
	Software reset register data size.
#define	CVT_V1724_SW_CLEAR_DATA_SIZE   cvD32
	Software clear register data size.
#define	CVT_V1724_FLASH_EN_DATA_SIZE   cvD32
	Flash enable data size.
#define	CVT_V1724_FLASH_DATA_DATA_SIZE   cvD32
	Flash data data size.
#define	CVT_V1724_RELOAD_CONFIG_DATA_SIZE   cvD32
	Configuration Reload data size.
#define	CVT_V1724_BASE_ADDRESS_DATA_SIZE   cvD32
	Base Address data size.
#define	CVT_V1724_ROM_CHKSUM_DATA_SIZE   cvD32
	Configuration ROM checksum data size.
#define	CVT_V1724_ROM_CHKSUM_LEN_2_DATA_SIZE   cvD32
	Configuration ROM checksum length (MSB) data size.
#define	CVT_V1724_ROM_CHKSUM_LEN_1_DATA_SIZE   cvD32
	Configuration ROM checksum length data size.
#define	CVT_V1724_ROM_CHKSUM_LEN_0_DATA_SIZE   cvD32
	Configuration ROM checksum length (LSB) data size.
#define	CVT_V1724_ROM_CONST_2_DATA_SIZE   cvD32
	Configuration ROM constant (MSB) data size.
#define	CVT_V1724_ROM_CONST_1_DATA_SIZE   cvD32
	Configuration ROM constant data size.
#define	CVT_V1724_ROM_CONST_0_DATA_SIZE   cvD32
	Configuration ROM constant (LSB) data size.
#define	CVT_V1724_ROM_C_CODE_DATA_SIZE   cvD32
	Configuration ROM c_code data size.
#define	CVT_V1724_ROM_R_CODE_DATA_SIZE   cvD32
	Configuration ROM r_code data size.
#define	CVT_V1724_ROM_OUI_2_DATA_SIZE   cvD32
	Configuration ROM Manufacturer identifier (IEEE OUI) (MSB) data size.
#define	CVT_V1724_ROM_OUI_1_DATA_SIZE   cvD32
	Configuration ROM Manufacturer identifier (IEEE OUI) data size.
#define	CVT_V1724_ROM_OUI_0_DATA_SIZE   cvD32
	Configuration ROM Manufacturer identifier (IEEE OUI) (LSB) data size.
#define	CVT_V1724_ROM_VERSION_DATA_SIZE   cvD32
	Configuration ROM Purchased version of the Mod.V1724 data size.
#define	CVT_V1724_ROM_BOARD_ID_2_DATA_SIZE   cvD32
	Configuration ROM Board identifier (MSB) data size.
#define	CVT_V1724_ROM_BOARD_ID_1_DATA_SIZE   cvD32
	Configuration ROM Board identifier data size.
#define	CVT_V1724_ROM_BOARD_ID_0_DATA_SIZE   cvD32
	Configuration ROM Board identifier (LSB) data size.
#define	CVT_V1724_ROM_REVISION_3_DATA_SIZE   cvD32
	Configuration ROM Hardware revision identifier data size.
#define	CVT_V1724_ROM_REVISION_2_DATA_SIZE   cvD32
	Configuration ROM Hardware revision identifier data size.
#define	CVT_V1724_ROM_REVISION_1_DATA_SIZE   cvD32
	Configuration ROM Hardware revision identifier data size.
#define	CVT_V1724_ROM_REVISION_0_DATA_SIZE   cvD32
	Configuration ROM Hardware revision identifier data size.
#define	CVT_V1724_ROM_SERIAL_1_DATA_SIZE   cvD32
	Configuration ROM Serial number (MSB) data size.
#define	CVT_V1724_ROM_SERIAL_0_DATA_SIZE   cvD32
	Configuration ROM Serial number (LSB) data size.
#define	CVT_V1724_CH0_RESERVED_RND_ACC_DATA_SIZE   cvD32
	CH 0 Read Block channel broadcast reserved register data size.
#define	CVT_V1724_CH0_THRESHOLD_DATA_SIZE   cvD32
	CH 0 Threshold register data size.
#define	CVT_V1724_CH0_TIME_OVER_UNDER_THR_DATA_SIZE   cvD32
	CH 0 Over/Under Threshold Samples register data size.
#define	CVT_V1724_CH0_STATUS_DATA_SIZE   cvD32
	CH 0 status register data size.
#define	CVT_V1724_CH0_FW_REV_DATA_SIZE   cvD32
	CH 0 firmware revision register data size.
#define	CVT_V1724_CH0_BUFF_OCCUPANCY_DATA_SIZE   cvD32
	CH 0 Number of Buffers Filled register data size.
#define	CVT_V1724_CH0_DAC_CONF_DATA_SIZE   cvD32
	CH 0 DAC Data Configuration register data size.
#define	CVT_V1724_CH0_ADC_CONF_DATA_SIZE   cvD32
	CH 0 Configuration register data size.
#define	CVT_V1724_CH0_RESERVED_ADC_DEBUG_DATA_SIZE   cvD32
	CH 0 ADC Debug Reserved register data size.
#define	CVT_V1724_CH0_RESERVED_MEM_DATA_DATA_SIZE   cvD32
	CH 0 Memory test data Reserved register data size.
#define	CVT_V1724_CH0_RESERVED_MEM_ADDRESS_DATA_SIZE   cvD32
	CH 0 Memory test address Reserved register data size.
#define	CVT_V1724_CH1_RESERVED_RND_ACC_DATA_SIZE   cvD32
	CH 1 Read Block channel broadcast reserved register data size.
#define	CVT_V1724_CH1_THRESHOLD_DATA_SIZE   cvD32
	CH 1 Threshold register data size.
#define	CVT_V1724_CH1_TIME_OVER_UNDER_THR_DATA_SIZE   cvD32
	CH 1 Over/Under Threshold Samples register data size.
#define	CVT_V1724_CH1_STATUS_DATA_SIZE   cvD32
	CH 1 status register data size.
#define	CVT_V1724_CH1_FW_REV_DATA_SIZE   cvD32
	CH 1 firmware revision register data size.
#define	CVT_V1724_CH1_BUFF_OCCUPANCY_DATA_SIZE   cvD32
	CH 1 Number of Buffers Filled register data size.
#define	CVT_V1724_CH1_DAC_CONF_DATA_SIZE   cvD32
	CH 1 DAC Data Configuration register data size.
#define	CVT_V1724_CH1_ADC_CONF_DATA_SIZE   cvD32
	CH 1 Configuration register data size.
#define	CVT_V1724_CH1_RESERVED_ADC_DEBUG_DATA_SIZE   cvD32
	CH 1 ADC Debug Reserved register data size.
#define	CVT_V1724_CH1_RESERVED_MEM_DATA_DATA_SIZE   cvD32
	CH 1 Memory test data Reserved register data size.
#define	CVT_V1724_CH1_RESERVED_MEM_ADDRESS_DATA_SIZE   cvD32
	CH 1 Memory test address Reserved register data size.
#define	CVT_V1724_CH2_RESERVED_RND_ACC_DATA_SIZE   cvD32
	CH 2 Read Block channel broadcast reserved register data size.
#define	CVT_V1724_CH2_THRESHOLD_DATA_SIZE   cvD32
	CH 2 Threshold register data size.
#define	CVT_V1724_CH2_TIME_OVER_UNDER_THR_DATA_SIZE   cvD32
	CH 2 Over/Under Threshold Samples register data size.
#define	CVT_V1724_CH2_STATUS_DATA_SIZE   cvD32
	CH 2 status register data size.
#define	CVT_V1724_CH2_FW_REV_DATA_SIZE   cvD32
	CH 2 firmware revision register data size.
#define	CVT_V1724_CH2_BUFF_OCCUPANCY_DATA_SIZE   cvD32
	CH 2 Number of Buffers Filled register data size.
#define	CVT_V1724_CH2_DAC_CONF_DATA_SIZE   cvD32
	CH 2 DAC Data Configuration register data size.
#define	CVT_V1724_CH2_ADC_CONF_DATA_SIZE   cvD32
	CH 2 Configuration register data size.
#define	CVT_V1724_CH2_RESERVED_ADC_DEBUG_DATA_SIZE   cvD32
	CH 2 ADC Debug Reserved register data size.
#define	CVT_V1724_CH2_RESERVED_MEM_DATA_DATA_SIZE   cvD32
	CH 2 Memory test data Reserved register data size.
#define	CVT_V1724_CH2_RESERVED_MEM_ADDRESS_DATA_SIZE   cvD32
	CH 2 Memory test address Reserved register data size.
#define	CVT_V1724_CH3_RESERVED_RND_ACC_DATA_SIZE   cvD32
	CH 3 Read Block channel broadcast reserved register data size.
#define	CVT_V1724_CH3_THRESHOLD_DATA_SIZE   cvD32
	CH 3 Threshold register data size.
#define	CVT_V1724_CH3_TIME_OVER_UNDER_THR_DATA_SIZE   cvD32
	CH 3 Over/Under Threshold Samples register data size.
#define	CVT_V1724_CH3_STATUS_DATA_SIZE   cvD32
	CH 3 status register data size.
#define	CVT_V1724_CH3_FW_REV_DATA_SIZE   cvD32
	CH 3 firmware revision register data size.
#define	CVT_V1724_CH3_BUFF_OCCUPANCY_DATA_SIZE   cvD32
	CH 3 Number of Buffers Filled register data size.
#define	CVT_V1724_CH3_DAC_CONF_DATA_SIZE   cvD32
	CH 3 DAC Data Configuration register data size.
#define	CVT_V1724_CH3_ADC_CONF_DATA_SIZE   cvD32
	CH 3 Configuration register data size.
#define	CVT_V1724_CH3_RESERVED_ADC_DEBUG_DATA_SIZE   cvD32
	CH 3 ADC Debug Reserved register data size.
#define	CVT_V1724_CH3_RESERVED_MEM_DATA_DATA_SIZE   cvD32
	CH 3 Memory test data Reserved register data size.
#define	CVT_V1724_CH3_RESERVED_MEM_ADDRESS_DATA_SIZE   cvD32
	CH 3 Memory test address Reserved register data size.
#define	CVT_V1724_CH4_RESERVED_RND_ACC_DATA_SIZE   cvD32
	CH 4 Read Block channel broadcast reserved register data size.
#define	CVT_V1724_CH4_THRESHOLD_DATA_SIZE   cvD32
	CH 4 Threshold register data size.
#define	CVT_V1724_CH4_TIME_OVER_UNDER_THR_DATA_SIZE   cvD32
	CH 4 Over/Under Threshold Samples register data size.
#define	CVT_V1724_CH4_STATUS_DATA_SIZE   cvD32
	CH 4 status register data size.
#define	CVT_V1724_CH4_FW_REV_DATA_SIZE   cvD32
	CH 4 firmware revision register data size.
#define	CVT_V1724_CH4_BUFF_OCCUPANCY_DATA_SIZE   cvD32
	CH 4 Number of Buffers Filled register data size.
#define	CVT_V1724_CH4_DAC_CONF_DATA_SIZE   cvD32
	CH 4 DAC Data Configuration register data size.
#define	CVT_V1724_CH4_ADC_CONF_DATA_SIZE   cvD32
	CH 4 Configuration register data size.
#define	CVT_V1724_CH4_RESERVED_ADC_DEBUG_DATA_SIZE   cvD32
	CH 4 ADC Debug Reserved register data size.
#define	CVT_V1724_CH4_RESERVED_MEM_DATA_DATA_SIZE   cvD32
	CH 4 Memory test data Reserved register data size.
#define	CVT_V1724_CH4_RESERVED_MEM_ADDRESS_DATA_SIZE   cvD32
	CH 4 Memory test address Reserved register data size.
#define	CVT_V1724_CH5_RESERVED_RND_ACC_DATA_SIZE   cvD32
	CH 5 Read Block channel broadcast reserved register data size.
#define	CVT_V1724_CH5_THRESHOLD_DATA_SIZE   cvD32
	CH 5 Threshold register data size.
#define	CVT_V1724_CH5_TIME_OVER_UNDER_THR_DATA_SIZE   cvD32
	CH 5 Over/Under Threshold Samples register data size.
#define	CVT_V1724_CH5_STATUS_DATA_SIZE   cvD32
	CH 5 status register data size.
#define	CVT_V1724_CH5_FW_REV_DATA_SIZE   cvD32
	CH 5 firmware revision register data size.
#define	CVT_V1724_CH5_BUFF_OCCUPANCY_DATA_SIZE   cvD32
	CH 5 Number of Buffers Filled register data size.
#define	CVT_V1724_CH5_DAC_CONF_DATA_SIZE   cvD32
	CH 5 DAC Data Configuration register data size.
#define	CVT_V1724_CH5_ADC_CONF_DATA_SIZE   cvD32
	CH 5 Configuration register data size.
#define	CVT_V1724_CH5_RESERVED_ADC_DEBUG_DATA_SIZE   cvD32
	CH 5 ADC Debug Reserved register data size.
#define	CVT_V1724_CH5_RESERVED_MEM_DATA_DATA_SIZE   cvD32
	CH 5 Memory test data Reserved register data size.
#define	CVT_V1724_CH5_RESERVED_MEM_ADDRESS_DATA_SIZE   cvD32
	CH 5 Memory test address Reserved register data size.
#define	CVT_V1724_CH6_RESERVED_RND_ACC_DATA_SIZE   cvD32
	CH 6 Read Block channel broadcast reserved register data size.
#define	CVT_V1724_CH6_THRESHOLD_DATA_SIZE   cvD32
	CH 6 Threshold register data size.
#define	CVT_V1724_CH6_TIME_OVER_UNDER_THR_DATA_SIZE   cvD32
	CH 6 Over/Under Threshold Samples register data size.
#define	CVT_V1724_CH6_STATUS_DATA_SIZE   cvD32
	CH 6 status register data size.
#define	CVT_V1724_CH6_FW_REV_DATA_SIZE   cvD32
	CH 6 firmware revision register data size.
#define	CVT_V1724_CH6_BUFF_OCCUPANCY_DATA_SIZE   cvD32
	CH 6 Number of Buffers Filled register data size.
#define	CVT_V1724_CH6_DAC_CONF_DATA_SIZE   cvD32
	CH 6 DAC Data Configuration register data size.
#define	CVT_V1724_CH6_ADC_CONF_DATA_SIZE   cvD32
	CH 6 Configuration register data size.
#define	CVT_V1724_CH6_RESERVED_ADC_DEBUG_DATA_SIZE   cvD32
	CH 6 ADC Debug Reserved register data size.
#define	CVT_V1724_CH6_RESERVED_MEM_DATA_DATA_SIZE   cvD32
	CH 6 Memory test data Reserved register data size.
#define	CVT_V1724_CH6_RESERVED_MEM_ADDRESS_DATA_SIZE   cvD32
	CH 6 Memory test address Reserved register data size.
#define	CVT_V1724_CH7_RESERVED_RND_ACC_DATA_SIZE   cvD32
	CH 7 Read Block channel broadcast reserved register data size.
#define	CVT_V1724_CH7_THRESHOLD_DATA_SIZE   cvD32
	CH 7 Threshold register data size.
#define	CVT_V1724_CH7_TIME_OVER_UNDER_THR_DATA_SIZE   cvD32
	CH 7 Over/Under Threshold Samples register data size.
#define	CVT_V1724_CH7_STATUS_DATA_SIZE   cvD32
	CH 7 status register data size.
#define	CVT_V1724_CH7_FW_REV_DATA_SIZE   cvD32
	CH 7 firmware revision register data size.
#define	CVT_V1724_CH7_BUFF_OCCUPANCY_DATA_SIZE   cvD32
	CH 7 Number of Buffers Filled register data size.
#define	CVT_V1724_CH7_DAC_CONF_DATA_SIZE   cvD32
	CH 7 DAC Data Configuration register data size.
#define	CVT_V1724_CH7_ADC_CONF_DATA_SIZE   cvD32
	CH 7 Configuration register data size.
#define	CVT_V1724_CH7_RESERVED_ADC_DEBUG_DATA_SIZE   cvD32
	CH 7 ADC Debug Reserved register data size.
#define	CVT_V1724_CH7_RESERVED_MEM_DATA_DATA_SIZE   cvD32
	CH 7 Memory test data Reserved register data size.
#define	CVT_V1724_CH7_RESERVED_MEM_ADDRESS_DATA_SIZE   cvD32
	CH 7 Memory test address Reserved register data size.
#define	CVT_V1724_OUT_BUFFER_AM   cvA32_S_MBLT
	Output buffer data buffer address modifier.
#define	CVT_V1724_BROAD_CH_CTRL_AM   cvA32_S_DATA
	Control channel broadcast register address modifier (Write only).
#define	CVT_V1724_BROAD_CH_SET_CTRL_AM   cvA32_S_DATA
	Set control channel broadcast register address modifier (Write only).
#define	CVT_V1724_BROAD_CH_CLEAR_CTRL_AM   cvA32_S_DATA
	Clear control channel broadcast register address modifier (Write only).
#define	CVT_V1724_BROAD_CH_BUFF_SIZE_AM   cvA32_S_DATA
	Buffer size channel broadcast register address modifiere(Write only).
#define	CVT_V1724_BROAD_CH_BUFF_FLUSH_AM   cvA32_S_DATA
	Number of buffers to be removed channel broadcast register address modifiere(Write only).
#define	CVT_V1724_BROAD_CH_RND_ACC_AM   cvA32_S_DATA
	Parameters to Random access channel broadcast register address modifier (Write only).
#define	CVT_V1724_ACQ_CONTROL_AM   cvA32_S_DATA
	Acquisiton Control register address modifier.
#define	CVT_V1724_ACQ_STATUS_AM   cvA32_S_DATA
	Acquisiton Status register address modifier.
#define	CVT_V1724_SW_TRIGGER_AM   cvA32_S_DATA
	Software trigger register address modifier.
#define	CVT_V1724_TRIGGER_SRC_ENABLE_AM   cvA32_S_DATA
	Trigger source enable register address modifier.
#define	CVT_V1724_FP_TRIGGER_OUT_ENABLE_AM   cvA32_S_DATA
	Front panel trigger out enable mask register address modifier.
#define	CVT_V1724_POST_TRIG_AM   cvA32_S_DATA
	Post trigger register address modifier.
#define	CVT_V1724_FRONT_PANEL_IO_AM   cvA32_S_DATA
	Front panel IO register address modifier.
#define	CVT_V1724_FRONT_PANEL_IO_CTRL_AM   cvA32_S_DATA
	Front panel IO Control register address modifier.
#define	CVT_V1724_CH_ENABLE_AM   cvA32_S_DATA
	Channel enable mask register address modifier.
#define	CVT_V1724_FW_REV_AM   cvA32_S_DATA
	Firmware Revision register address modifier.
#define	CVT_V1724_DOWNSAMPLE_FACT_AM   cvA32_S_DATA
	DownSample factor register address modifier.
#define	CVT_V1724_EVENT_STORED_AM   cvA32_S_DATA
	Event stored register address modifier.
#define	CVT_V1724_VME_CONTROL_AM   cvA32_S_DATA
	VME Control register address modifier.
#define	CVT_V1724_VME_STATUS_AM   cvA32_S_DATA
	VME Status register address modifier.
#define	CVT_V1724_BOARD_ID_AM   cvA32_S_DATA
	Geo Address register address modifier.
#define	CVT_V1724_MCST_CBLT_ADD_CTRL_AM   cvA32_S_DATA
	MCST/CBLT Address and control register address modifier.
#define	CVT_V1724_RELOCATION_ADDRESS_AM   cvA32_S_DATA
	Relocation address register address modifier.
#define	CVT_V1724_INT_STATUS_ID_AM   cvA32_S_DATA
	Interrupt status id register address modifier.
#define	CVT_V1724_INT_EVENT_NUM_AM   cvA32_S_DATA
	Interrupt event number register address modifier.
#define	CVT_V1724_BLT_EVENT_NUM_AM   cvA32_S_DATA
	BLT event number register address modifier.
#define	CVT_V1724_SCRATCH_AM   cvA32_S_DATA
	Scratch register address modifier.
#define	CVT_V1724_SW_RESET_AM   cvA32_S_DATA
	Software reset register address modifier.
#define	CVT_V1724_SW_CLEAR_AM   cvA32_S_DATA
	Software clear register address modifier.
#define	CVT_V1724_FLASH_EN_AM   cvA32_S_DATA
	Flash enable address modifier.
#define	CVT_V1724_FLASH_DATA_AM   cvA32_S_DATA
	Flash data address modifier.
#define	CVT_V1724_RELOAD_CONFIG_AM   cvA32_S_DATA
	Configuration Reload address modifier.
#define	CVT_V1724_BASE_ADDRESS_AM   cvA32_S_DATA
	Base Address address modifier.
#define	CVT_V1724_ROM_CHKSUM_AM   cvA32_S_DATA
	Configuration ROM checksum address modifier.
#define	CVT_V1724_ROM_CHKSUM_LEN_2_AM   cvA32_S_DATA
	Configuration ROM checksum length (MSB) address modifier.
#define	CVT_V1724_ROM_CHKSUM_LEN_1_AM   cvA32_S_DATA
	Configuration ROM checksum length address modifier.
#define	CVT_V1724_ROM_CHKSUM_LEN_0_AM   cvA32_S_DATA
	Configuration ROM checksum length (LSB) address modifier.
#define	CVT_V1724_ROM_CONST_2_AM   cvA32_S_DATA
	Configuration ROM constant (MSB) address modifier.
#define	CVT_V1724_ROM_CONST_1_AM   cvA32_S_DATA
	Configuration ROM constant address modifier.
#define	CVT_V1724_ROM_CONST_0_AM   cvA32_S_DATA
	Configuration ROM constant (LSB) address modifier.
#define	CVT_V1724_ROM_C_CODE_AM   cvA32_S_DATA
	Configuration ROM c_code address modifier.
#define	CVT_V1724_ROM_R_CODE_AM   cvA32_S_DATA
	Configuration ROM r_code address modifier.
#define	CVT_V1724_ROM_OUI_2_AM   cvA32_S_DATA
	Configuration ROM Manufacturer identifier (IEEE OUI) (MSB) address modifier.
#define	CVT_V1724_ROM_OUI_1_AM   cvA32_S_DATA
	Configuration ROM Manufacturer identifier (IEEE OUI) address modifier.
#define	CVT_V1724_ROM_OUI_0_AM   cvA32_S_DATA
	Configuration ROM Manufacturer identifier (IEEE OUI) (LSB) address modifier.
#define	CVT_V1724_ROM_VERSION_AM   cvA32_S_DATA
	Configuration ROM Purchased version of the Mod.V1724 address modifier.
#define	CVT_V1724_ROM_BOARD_ID_2_AM   cvA32_S_DATA
	Configuration ROM Board identifier (MSB) address modifier.
#define	CVT_V1724_ROM_BOARD_ID_1_AM   cvA32_S_DATA
	Configuration ROM Board identifier address modifier.
#define	CVT_V1724_ROM_BOARD_ID_0_AM   cvA32_S_DATA
	Configuration ROM Board identifier (LSB) address modifier.
#define	CVT_V1724_ROM_REVISION_3_AM   cvA32_S_DATA
	Configuration ROM Hardware revision identifier address modifier.
#define	CVT_V1724_ROM_REVISION_2_AM   cvA32_S_DATA
	Configuration ROM Hardware revision identifier address modifier.
#define	CVT_V1724_ROM_REVISION_1_AM   cvA32_S_DATA
	Configuration ROM Hardware revision identifier address modifier.
#define	CVT_V1724_ROM_REVISION_0_AM   cvA32_S_DATA
	Configuration ROM Hardware revision identifier address modifier.
#define	CVT_V1724_ROM_SERIAL_1_AM   cvA32_S_DATA
	Configuration ROM Serial number (MSB) address modifier.
#define	CVT_V1724_ROM_SERIAL_0_AM   cvA32_S_DATA
	Configuration ROM Serial number (LSB) address modifier.
#define	CVT_V1724_CH0_RESERVED_RND_ACC_AM   cvA32_S_DATA
	CH 0 Read Block channel broadcast reserved register address modifier.
#define	CVT_V1724_CH0_THRESHOLD_AM   cvA32_S_DATA
	CH 0 Threshold register address modifier.
#define	CVT_V1724_CH0_TIME_OVER_UNDER_THR_AM   cvA32_S_DATA
	CH 0 Over/Under Threshold Samples register address modifier.
#define	CVT_V1724_CH0_STATUS_AM   cvA32_S_DATA
	CH 0 status register address modifier.
#define	CVT_V1724_CH0_FW_REV_AM   cvA32_S_DATA
	CH 0 firmware revision register address modifier.
#define	CVT_V1724_CH0_BUFF_OCCUPANCY_AM   cvA32_S_DATA
	CH 0 Number of Buffers Filled register address modifier.
#define	CVT_V1724_CH0_DAC_CONF_AM   cvA32_S_DATA
	CH 0 DAC Data Configuration register address modifier.
#define	CVT_V1724_CH0_ADC_CONF_AM   cvA32_S_DATA
	CH 0 Configuration register address modifier.
#define	CVT_V1724_CH0_RESERVED_ADC_DEBUG_AM   cvA32_S_DATA
	CH 0 ADC Debug Reserved register address modifier.
#define	CVT_V1724_CH0_RESERVED_MEM_DATA_AM   cvA32_S_DATA
	CH 0 Memory test data Reserved register address modifier.
#define	CVT_V1724_CH0_RESERVED_MEM_ADDRESS_AM   cvA32_S_DATA
	CH 0 Memory test address Reserved register address modifier.
#define	CVT_V1724_CH1_RESERVED_RND_ACC_AM   cvA32_S_DATA
	CH 1 Read Block channel broadcast reserved register address modifier.
#define	CVT_V1724_CH1_THRESHOLD_AM   cvA32_S_DATA
	CH 1 Threshold register address modifier.
#define	CVT_V1724_CH1_TIME_OVER_UNDER_THR_AM   cvA32_S_DATA
	CH 1 Over/Under Threshold Samples register address modifier.
#define	CVT_V1724_CH1_STATUS_AM   cvA32_S_DATA
	CH 1 status register address modifier.
#define	CVT_V1724_CH1_FW_REV_AM   cvA32_S_DATA
	CH 1 firmware revision register address modifier.
#define	CVT_V1724_CH1_BUFF_OCCUPANCY_AM   cvA32_S_DATA
	CH 1 Number of Buffers Filled register address modifier.
#define	CVT_V1724_CH1_DAC_CONF_AM   cvA32_S_DATA
	CH 1 DAC Data Configuration register address modifier.
#define	CVT_V1724_CH1_ADC_CONF_AM   cvA32_S_DATA
	CH 1 Configuration register address modifier.
#define	CVT_V1724_CH1_RESERVED_ADC_DEBUG_AM   cvA32_S_DATA
	CH 1 ADC Debug Reserved register address modifier.
#define	CVT_V1724_CH1_RESERVED_MEM_DATA_AM   cvA32_S_DATA
	CH 1 Memory test data Reserved register address modifier.
#define	CVT_V1724_CH1_RESERVED_MEM_ADDRESS_AM   cvA32_S_DATA
	CH 1 Memory test address Reserved register address modifier.
#define	CVT_V1724_CH2_RESERVED_RND_ACC_AM   cvA32_S_DATA
	CH 2 Read Block channel broadcast reserved register address modifier.
#define	CVT_V1724_CH2_THRESHOLD_AM   cvA32_S_DATA
	CH 2 Threshold register address modifier.
#define	CVT_V1724_CH2_TIME_OVER_UNDER_THR_AM   cvA32_S_DATA
	CH 2 Over/Under Threshold Samples register address modifier.
#define	CVT_V1724_CH2_STATUS_AM   cvA32_S_DATA
	CH 2 status register address modifier.
#define	CVT_V1724_CH2_FW_REV_AM   cvA32_S_DATA
	CH 2 firmware revision register address modifier.
#define	CVT_V1724_CH2_BUFF_OCCUPANCY_AM   cvA32_S_DATA
	CH 2 Number of Buffers Filled register address modifier.
#define	CVT_V1724_CH2_DAC_CONF_AM   cvA32_S_DATA
	CH 2 DAC Data Configuration register address modifier.
#define	CVT_V1724_CH2_ADC_CONF_AM   cvA32_S_DATA
	CH 2 Configuration register address modifier.
#define	CVT_V1724_CH2_RESERVED_ADC_DEBUG_AM   cvA32_S_DATA
	CH 2 ADC Debug Reserved register address modifier.
#define	CVT_V1724_CH2_RESERVED_MEM_DATA_AM   cvA32_S_DATA
	CH 2 Memory test data Reserved register address modifier.
#define	CVT_V1724_CH2_RESERVED_MEM_ADDRESS_AM   cvA32_S_DATA
	CH 2 Memory test address Reserved register address modifier.
#define	CVT_V1724_CH3_RESERVED_RND_ACC_AM   cvA32_S_DATA
	CH 3 Read Block channel broadcast reserved register address modifier.
#define	CVT_V1724_CH3_THRESHOLD_AM   cvA32_S_DATA
	CH 3 Threshold register address modifier.
#define	CVT_V1724_CH3_TIME_OVER_UNDER_THR_AM   cvA32_S_DATA
	CH 3 Over/Under Threshold Samples register address modifier.
#define	CVT_V1724_CH3_STATUS_AM   cvA32_S_DATA
	CH 3 status register address modifier.
#define	CVT_V1724_CH3_FW_REV_AM   cvA32_S_DATA
	CH 3 firmware revision register address modifier.
#define	CVT_V1724_CH3_BUFF_OCCUPANCY_AM   cvA32_S_DATA
	CH 3 Number of Buffers Filled register address modifier.
#define	CVT_V1724_CH3_DAC_CONF_AM   cvA32_S_DATA
	CH 3 DAC Data Configuration register address modifier.
#define	CVT_V1724_CH3_ADC_CONF_AM   cvA32_S_DATA
	CH 3 Configuration register address modifier.
#define	CVT_V1724_CH3_RESERVED_ADC_DEBUG_AM   cvA32_S_DATA
	CH 3 ADC Debug Reserved register address modifier.
#define	CVT_V1724_CH3_RESERVED_MEM_DATA_AM   cvA32_S_DATA
	CH 3 Memory test data Reserved register address modifier.
#define	CVT_V1724_CH3_RESERVED_MEM_ADDRESS_AM   cvA32_S_DATA
	CH 3 Memory test address Reserved register address modifier.
#define	CVT_V1724_CH4_RESERVED_RND_ACC_AM   cvA32_S_DATA
	CH 4 Read Block channel broadcast reserved register address modifier.
#define	CVT_V1724_CH4_THRESHOLD_AM   cvA32_S_DATA
	CH 4 Threshold register address modifier.
#define	CVT_V1724_CH4_TIME_OVER_UNDER_THR_AM   cvA32_S_DATA
	CH 4 Over/Under Threshold Samples register address modifier.
#define	CVT_V1724_CH4_STATUS_AM   cvA32_S_DATA
	CH 4 status register address modifier.
#define	CVT_V1724_CH4_FW_REV_AM   cvA32_S_DATA
	CH 4 firmware revision register address modifier.
#define	CVT_V1724_CH4_BUFF_OCCUPANCY_AM   cvA32_S_DATA
	CH 4 Number of Buffers Filled register address modifier.
#define	CVT_V1724_CH4_DAC_CONF_AM   cvA32_S_DATA
	CH 4 DAC Data Configuration register address modifier.
#define	CVT_V1724_CH4_ADC_CONF_AM   cvA32_S_DATA
	CH 4 Configuration register address modifier.
#define	CVT_V1724_CH4_RESERVED_ADC_DEBUG_AM   cvA32_S_DATA
	CH 4 ADC Debug Reserved register address modifier.
#define	CVT_V1724_CH4_RESERVED_MEM_DATA_AM   cvA32_S_DATA
	CH 4 Memory test data Reserved register address modifier.
#define	CVT_V1724_CH4_RESERVED_MEM_ADDRESS_AM   cvA32_S_DATA
	CH 4 Memory test address Reserved register address modifier.
#define	CVT_V1724_CH5_RESERVED_RND_ACC_AM   cvA32_S_DATA
	CH 5 Read Block channel broadcast reserved register address modifier.
#define	CVT_V1724_CH5_THRESHOLD_AM   cvA32_S_DATA
	CH 5 Threshold register address modifier.
#define	CVT_V1724_CH5_TIME_OVER_UNDER_THR_AM   cvA32_S_DATA
	CH 5 Over/Under Threshold Samples register address modifier.
#define	CVT_V1724_CH5_STATUS_AM   cvA32_S_DATA
	CH 5 status register address modifier.
#define	CVT_V1724_CH5_FW_REV_AM   cvA32_S_DATA
	CH 5 firmware revision register address modifier.
#define	CVT_V1724_CH5_BUFF_OCCUPANCY_AM   cvA32_S_DATA
	CH 5 Number of Buffers Filled register address modifier.
#define	CVT_V1724_CH5_DAC_CONF_AM   cvA32_S_DATA
	CH 5 DAC Data Configuration register address modifier.
#define	CVT_V1724_CH5_ADC_CONF_AM   cvA32_S_DATA
	CH 5 Configuration register address modifier.
#define	CVT_V1724_CH5_RESERVED_ADC_DEBUG_AM   cvA32_S_DATA
	CH 5 ADC Debug Reserved register address modifier.
#define	CVT_V1724_CH5_RESERVED_MEM_DATA_AM   cvA32_S_DATA
	CH 5 Memory test data Reserved register address modifier.
#define	CVT_V1724_CH5_RESERVED_MEM_ADDRESS_AM   cvA32_S_DATA
	CH 5 Memory test address Reserved register address modifier.
#define	CVT_V1724_CH6_RESERVED_RND_ACC_AM   cvA32_S_DATA
	CH 6 Read Block channel broadcast reserved register address modifier.
#define	CVT_V1724_CH6_THRESHOLD_AM   cvA32_S_DATA
	CH 6 Threshold register address modifier.
#define	CVT_V1724_CH6_TIME_OVER_UNDER_THR_AM   cvA32_S_DATA
	CH 6 Over/Under Threshold Samples register address modifier.
#define	CVT_V1724_CH6_STATUS_AM   cvA32_S_DATA
	CH 6 status register address modifier.
#define	CVT_V1724_CH6_FW_REV_AM   cvA32_S_DATA
	CH 6 firmware revision register address modifier.
#define	CVT_V1724_CH6_BUFF_OCCUPANCY_AM   cvA32_S_DATA
	CH 6 Number of Buffers Filled register address modifier.
#define	CVT_V1724_CH6_DAC_CONF_AM   cvA32_S_DATA
	CH 6 DAC Data Configuration register address modifier.
#define	CVT_V1724_CH6_ADC_CONF_AM   cvA32_S_DATA
	CH 6 Configuration register address modifier.
#define	CVT_V1724_CH6_RESERVED_ADC_DEBUG_AM   cvA32_S_DATA
	CH 6 ADC Debug Reserved register address modifier.
#define	CVT_V1724_CH6_RESERVED_MEM_DATA_AM   cvA32_S_DATA
	CH 6 Memory test data Reserved register address modifier.
#define	CVT_V1724_CH6_RESERVED_MEM_ADDRESS_AM   cvA32_S_DATA
	CH 6 Memory test address Reserved register address modifier.
#define	CVT_V1724_CH7_RESERVED_RND_ACC_AM   cvA32_S_DATA
	CH 7 Read Block channel broadcast reserved register address modifier.
#define	CVT_V1724_CH7_THRESHOLD_AM   cvA32_S_DATA
	CH 7 Threshold register address modifier.
#define	CVT_V1724_CH7_TIME_OVER_UNDER_THR_AM   cvA32_S_DATA
	CH 7 Over/Under Threshold Samples register address modifier.
#define	CVT_V1724_CH7_STATUS_AM   cvA32_S_DATA
	CH 7 status register address modifier.
#define	CVT_V1724_CH7_FW_REV_AM   cvA32_S_DATA
	CH 7 firmware revision register address modifier.
#define	CVT_V1724_CH7_BUFF_OCCUPANCY_AM   cvA32_S_DATA
	CH 7 Number of Buffers Filled register address modifier.
#define	CVT_V1724_CH7_DAC_CONF_AM   cvA32_S_DATA
	CH 7 DAC Data Configuration register address modifier.
#define	CVT_V1724_CH7_ADC_CONF_AM   cvA32_S_DATA
	CH 7 Configuration register address modifier.
#define	CVT_V1724_CH7_RESERVED_ADC_DEBUG_AM   cvA32_S_DATA
	CH 7 ADC Debug Reserved register address modifier.
#define	CVT_V1724_CH7_RESERVED_MEM_DATA_AM   cvA32_S_DATA
	CH 7 Memory test data Reserved register address modifier.
#define	CVT_V1724_CH7_RESERVED_MEM_ADDRESS_AM   cvA32_S_DATA
	CH 7 Memory test address Reserved register address modifier.
#define	CVT_V1724_MAX_CHANNEL   8
	The number of channels.
#define	CVT_V1724_GET_INT_LEVEL(reg)   (((UINT32)reg)& CVT_V1724_VME_CTRL_INT_LEVEL_MSK)
	Extract the interrupt level from UINT32 value.
#define	CVT_V1724_SET_INT_LEVEL(reg, value)   reg= (((UINT32)reg)& ~CVT_V1724_VME_CTRL_INT_LEVEL_MSK)| ((UINT32)value& CVT_V1724_VME_CTRL_INT_LEVEL_MSK)
	Sets the interrupt level value into UINT32 value.
#define	CVT_V1724_GET_CH_RND_ACC_BLOCK_ADD(reg)   (((UINT32)reg)& CVT_V1724_BROAD_CHRNDACC_BLOCK_ADD_MSK)
	Extract the Address of Block to be read from UINT32 value.
#define	CVT_V1724_SET_CH_RND_ACC_BLOCK_ADD(reg, value)   reg= (((UINT32)reg)& ~CVT_V1724_BROAD_CHRNDACC_BLOCK_ADD_MSK)| ((UINT32)value& CVT_V1724_BROAD_CHRNDACC_BLOCK_ADD_MSK)
	Sets the Address of Block to be read into UINT32 value.
#define	CVT_V1724_GET_CH_RND_ACC_SAMPLE_NUM(reg)   ((((UINT32)reg)& CVT_V1724_BROAD_CHRNDACC_SAMPLE_NUM_MSK)>> 10)
	Extract the Number of samples to be read from UINT32 value.
#define	CVT_V1724_SET_CH_RND_ACC_SAMPLE_NUM(reg, value)   reg= (((UINT32)reg)& ~CVT_V1724_BROAD_CHRNDACC_SAMPLE_NUM_MSK)| ((((UINT32)value)<< 10)& CVT_V1724_BROAD_CHRNDACC_SAMPLE_NUM_MSK)
	Sets the Number of samples to be read into UINT32 value.
#define	CVT_V1724_GET_CH_RND_ACC_OFFSET(reg)   ((((UINT32)reg)& CVT_V1724_BROAD_CHRNDACC_OFFSET_MSK)>> 22)
	Extract the Offset of Address Data from UINT32 value.
#define	CVT_V1724_SET_CH_RND_ACC_OFFSET(reg, value)   reg= (((UINT32)reg)& ~CVT_V1724_BROAD_CHRNDACC_OFFSET_MSK)| ((((UINT32)value)<< 22)& CVT_V1724_BROAD_CHRNDACC_OFFSET_MSK)
	Sets the Offset of Address Data into UINT32 value.
#define	CVT_V1724_GET_ACQCTRL_ACQ_MODE(reg)   (((UINT32)reg)& CVT_V1724_ACQCTRL_ACQ_MODE_MSK)
	Extract the acquisition mode value from UINT32 value.
#define	CVT_V1724_SET_ACQCTRL_ACQ_MODE(reg, value)   reg= (((UINT32)reg)& ~CVT_V1724_ACQCTRL_ACQ_MODE_MSK)| ((UINT32)value& CVT_V1724_ACQCTRL_ACQ_MODE_MSK)
	Sets the acquisition mode value into UINT32 value.
#define	CVT_V1724_GET_FRONT_PANEL_IO(reg)   (((UINT32)reg)& CVT_V1724_FPIO_MSK)
	Extract front panel data from UINT32 value.
#define	CVT_V1724_SET_FRONT_PANEL_IO(reg, value)   reg= (((UINT32)reg)& ~CVT_V1724_FPIO_MSK)| ((UINT32)value& CVT_V1724_FPIO_MSK)
	Sets front panel data into UINT32 value.
#define	CVT_V1724_GET_FPIO_CTRL_DIR(reg)   ((((UINT32)reg)& CVT_V1724_FPIO_CTRL_DIR_MSK)>> 2)
	Extract the Front panel IO direction from UINT32 value.
#define	CVT_V1724_SET_FPIO_CTRL_DIR(reg, value)   reg= (((UINT32)reg)& ~CVT_V1724_FPIO_CTRL_DIR_MSK)| ((((UINT32)value)<< 2)& CVT_V1724_FPIO_CTRL_DIR_MSK)
	Sets the Front panel IO direction into UINT32 value.
#define	CVT_V1724_GET_FPIO_CTRL_MODE(reg)   ((((UINT32)reg)& CVT_V1724_FPIO_CTRL_MODE_MSK)>> 6)
	Extract the Front panel IO mode from UINT32 value.
#define	CVT_V1724_SET_FPIO_CTRL_MODE(reg, value)   reg= (((UINT32)reg)& ~CVT_V1724_FPIO_CTRL_MODE_MSK)| ((((UINT32)value)<< 6)& CVT_V1724_FPIO_CTRL_MODE_MSK)
	Sets the Front panel IO mode into UINT32 value.
#define	CVT_V1724_GET_CH_DAC_CONF(reg)   (((UINT32)reg)& CVT_V1724_CHDAC_DATA_MSK)
	Extract DAC's data from UINT32 value.
#define	CVT_V1724_SET_CH_DAC_CONF(reg, value)   reg= (((UINT32)reg)& ~CVT_V1724_CHDAC_DATA_MSK)| ((UINT32)value& CVT_V1724_CHDAC_DATA_MSK)
	Sets DAC's data into UINT32 value.
#define	CVT_V1724_GET_MCST_CBLT_ADD(reg)   (((UINT32)reg)& CVT_V1724_MCST_CBLT_ADD_MSK)
	Extract the Base Address of from UINT32 value.
#define	CVT_V1724_SET_MCST_CBLT_ADD(reg, value)   reg= (((UINT32)reg)& ~CVT_V1724_MCST_CBLT_ADD_MSK)| ((UINT32)value& CVT_V1724_MCST_CBLT_ADD_MSK)
	Sets the Base Address into UINT32 value.
#define	CVT_V1724_GET_MCST_CBLT_CTRL(reg)   ((((UINT32)reg)& CVT_V1724_MCST_CBLT_CTRL_MSK)>> 8)
	Extract the MCST-CBLT Control from UINT32 value.
#define	CVT_V1724_SET_MCST_CBLT_CTRL(reg, value)   reg= (((UINT32)reg)& ~CVT_V1724_MCST_CBLT_CTRL_MSK)| ((((UINT32)value)<< 8)& CVT_V1724_MCST_CBLT_CTRL_MSK)
	Sets MCST-CBLT Control into UINT32 value.
#define	V1724_FLASH_PAGE_SIZE   264
#define	V1724_HEADER_TAG_MSK   0xA0000000
	The V1724 Header tag msk.
#define	IS_HEADER_TAG(data_0)   ((data_0& 0xF0000000)== V1724_HEADER_TAG_MSK)
	Checks if type is header tag.
#define	GET_EVENT_TAG(data_0)   ((UINT32)((((UINT32)data_0)>>28)& 0x0000000f))
	Gets the tag of this event.
#define	GET_EVENT_BOARD_ID(data_0)   ((UINT32)((((UINT32)data_0)>>23)& 0x0000001f))
	Gets the board id of this event.
#define	GET_EVENT_SIZE(data_0)   ((UINT32)(((UINT32)data_0)& 0x007fffff))
	Gets the size of this event.
#define	GET_EVENT_ACTIVE_CHANNELS(data_1)   ((UINT32)(((UINT32)data_1)& 0x000000ff))
	Gets the active channel mask of this event.
#define	GET_EVENT_COUNT(data_2)   ((UINT32)(((UINT32)data_2)& 0x00ffffff))
	Gets the counter of this event.
#define	GET_EVENT_TRIGGER_TIME_TAG(data_3)   ((UINT32)(((UINT32)data_3)& 0xffffffff))
	Gets the Trigger time tag of this event.
#define	PACKED_1
#define	_INLINE_
#define	CVT_V1724_MAX_BLT_EVENT_NUM   4
	The maximum number of blt_event per readout cycle.
Enumerations
enum	CVT_V1724_REG_INDEX {   CVT_V1724_OUT_BUFFER_INDEX, CVT_V1724_BROAD_CH_CTRL_INDEX, CVT_V1724_BROAD_CH_SET_CTRL_INDEX, CVT_V1724_BROAD_CH_CLEAR_CTRL_INDEX,   CVT_V1724_BROAD_CH_BUFF_SIZE_INDEX, CVT_V1724_BROAD_CH_BUFF_FLUSH_INDEX, CVT_V1724_BROAD_CH_RND_ACC_INDEX, CVT_V1724_ACQ_CONTROL_INDEX,   CVT_V1724_ACQ_STATUS_INDEX, CVT_V1724_SW_TRIGGER_INDEX, CVT_V1724_TRIGGER_SRC_ENABLE_INDEX, CVT_V1724_FP_TRIGGER_OUT_ENABLE_INDEX,   CVT_V1724_POST_TRIG_INDEX, CVT_V1724_FRONT_PANEL_IO_INDEX, CVT_V1724_FRONT_PANEL_IO_CTRL_INDEX, CVT_V1724_CH_ENABLE_INDEX,   CVT_V1724_FW_REV_INDEX, CVT_V1724_DOWNSAMPLE_FACT_INDEX, CVT_V1724_EVENT_STORED_INDEX, CVT_V1724_VME_CONTROL_INDEX,   CVT_V1724_VME_STATUS_INDEX, CVT_V1724_BOARD_ID_INDEX, CVT_V1724_MCST_CBLT_ADD_CTRL_INDEX, CVT_V1724_RELOCATION_ADDRESS_INDEX,   CVT_V1724_INT_STATUS_ID_INDEX, CVT_V1724_INT_EVENT_NUM_INDEX, CVT_V1724_BLT_EVENT_NUM_INDEX, CVT_V1724_SCRATCH_INDEX,   CVT_V1724_SW_RESET_INDEX, CVT_V1724_SW_CLEAR_INDEX, CVT_V1724_FLASH_EN_INDEX, CVT_V1724_FLASH_DATA_INDEX,   CVT_V1724_RELOAD_CONFIG_INDEX, CVT_V1724_BASE_ADDRESS_INDEX, CVT_V1724_ROM_CHKSUM_INDEX, CVT_V1724_ROM_CHKSUM_LEN_2_INDEX,   CVT_V1724_ROM_CHKSUM_LEN_1_INDEX, CVT_V1724_ROM_CHKSUM_LEN_0_INDEX, CVT_V1724_ROM_CONST_2_INDEX, CVT_V1724_ROM_CONST_1_INDEX,   CVT_V1724_ROM_CONST_0_INDEX, CVT_V1724_ROM_C_CODE_INDEX, CVT_V1724_ROM_R_CODE_INDEX, CVT_V1724_ROM_OUI_2_INDEX,   CVT_V1724_ROM_OUI_1_INDEX, CVT_V1724_ROM_OUI_0_INDEX, CVT_V1724_ROM_VERSION_INDEX, CVT_V1724_ROM_BOARD_ID_2_INDEX,   CVT_V1724_ROM_BOARD_ID_1_INDEX, CVT_V1724_ROM_BOARD_ID_0_INDEX, CVT_V1724_ROM_REVISION_3_INDEX, CVT_V1724_ROM_REVISION_2_INDEX,   CVT_V1724_ROM_REVISION_1_INDEX, CVT_V1724_ROM_REVISION_0_INDEX, CVT_V1724_ROM_SERIAL_1_INDEX, CVT_V1724_ROM_SERIAL_0_INDEX,   CVT_V1724_CH0_RESERVED_RND_ACC_INDEX, CVT_V1724_CH0_THRESHOLD_INDEX, CVT_V1724_CH0_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH0_STATUS_INDEX,   CVT_V1724_CH0_FW_REV_INDEX, CVT_V1724_CH0_BUFF_OCCUPANCY_INDEX, CVT_V1724_CH0_DAC_CONF_INDEX, CVT_V1724_CH0_ADC_CONF_INDEX,   CVT_V1724_CH0_RESERVED_ADC_DEBUG_INDEX, CVT_V1724_CH0_RESERVED_MEM_DATA_INDEX, CVT_V1724_CH0_RESERVED_MEM_ADDRESS_INDEX, CVT_V1724_CH1_RESERVED_RND_ACC_INDEX,   CVT_V1724_CH1_THRESHOLD_INDEX, CVT_V1724_CH1_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH1_STATUS_INDEX, CVT_V1724_CH1_FW_REV_INDEX,   CVT_V1724_CH1_BUFF_OCCUPANCY_INDEX, CVT_V1724_CH1_DAC_CONF_INDEX, CVT_V1724_CH1_ADC_CONF_INDEX, CVT_V1724_CH1_RESERVED_ADC_DEBUG_INDEX,   CVT_V1724_CH1_RESERVED_MEM_DATA_INDEX, CVT_V1724_CH1_RESERVED_MEM_ADDRESS_INDEX, CVT_V1724_CH2_RESERVED_RND_ACC_INDEX, CVT_V1724_CH2_THRESHOLD_INDEX,   CVT_V1724_CH2_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH2_STATUS_INDEX, CVT_V1724_CH2_FW_REV_INDEX, CVT_V1724_CH2_BUFF_OCCUPANCY_INDEX,   CVT_V1724_CH2_DAC_CONF_INDEX, CVT_V1724_CH2_ADC_CONF_INDEX, CVT_V1724_CH2_RESERVED_ADC_DEBUG_INDEX, CVT_V1724_CH2_RESERVED_MEM_DATA_INDEX,   CVT_V1724_CH2_RESERVED_MEM_ADDRESS_INDEX, CVT_V1724_CH3_RESERVED_RND_ACC_INDEX, CVT_V1724_CH3_THRESHOLD_INDEX, CVT_V1724_CH3_TIME_OVER_UNDER_THR_INDEX,   CVT_V1724_CH3_STATUS_INDEX, CVT_V1724_CH3_FW_REV_INDEX, CVT_V1724_CH3_BUFF_OCCUPANCY_INDEX, CVT_V1724_CH3_DAC_CONF_INDEX,   CVT_V1724_CH3_ADC_CONF_INDEX, CVT_V1724_CH3_RESERVED_ADC_DEBUG_INDEX, CVT_V1724_CH3_RESERVED_MEM_DATA_INDEX, CVT_V1724_CH3_RESERVED_MEM_ADDRESS_INDEX,   CVT_V1724_CH4_RESERVED_RND_ACC_INDEX, CVT_V1724_CH4_THRESHOLD_INDEX, CVT_V1724_CH4_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH4_STATUS_INDEX,   CVT_V1724_CH4_FW_REV_INDEX, CVT_V1724_CH4_BUFF_OCCUPANCY_INDEX, CVT_V1724_CH4_DAC_CONF_INDEX, CVT_V1724_CH4_ADC_CONF_INDEX,   CVT_V1724_CH4_RESERVED_ADC_DEBUG_INDEX, CVT_V1724_CH4_RESERVED_MEM_DATA_INDEX, CVT_V1724_CH4_RESERVED_MEM_ADDRESS_INDEX, CVT_V1724_CH5_RESERVED_RND_ACC_INDEX,   CVT_V1724_CH5_THRESHOLD_INDEX, CVT_V1724_CH5_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH5_STATUS_INDEX, CVT_V1724_CH5_FW_REV_INDEX,   CVT_V1724_CH5_BUFF_OCCUPANCY_INDEX, CVT_V1724_CH5_DAC_CONF_INDEX, CVT_V1724_CH5_ADC_CONF_INDEX, CVT_V1724_CH5_RESERVED_ADC_DEBUG_INDEX,   CVT_V1724_CH5_RESERVED_MEM_DATA_INDEX, CVT_V1724_CH5_RESERVED_MEM_ADDRESS_INDEX, CVT_V1724_CH6_RESERVED_RND_ACC_INDEX, CVT_V1724_CH6_THRESHOLD_INDEX,   CVT_V1724_CH6_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH6_STATUS_INDEX, CVT_V1724_CH6_FW_REV_INDEX, CVT_V1724_CH6_BUFF_OCCUPANCY_INDEX,   CVT_V1724_CH6_DAC_CONF_INDEX, CVT_V1724_CH6_ADC_CONF_INDEX, CVT_V1724_CH6_RESERVED_ADC_DEBUG_INDEX, CVT_V1724_CH6_RESERVED_MEM_DATA_INDEX,   CVT_V1724_CH6_RESERVED_MEM_ADDRESS_INDEX, CVT_V1724_CH7_RESERVED_RND_ACC_INDEX, CVT_V1724_CH7_THRESHOLD_INDEX, CVT_V1724_CH7_TIME_OVER_UNDER_THR_INDEX,   CVT_V1724_CH7_STATUS_INDEX, CVT_V1724_CH7_FW_REV_INDEX, CVT_V1724_CH7_BUFF_OCCUPANCY_INDEX, CVT_V1724_CH7_DAC_CONF_INDEX,   CVT_V1724_CH7_ADC_CONF_INDEX, CVT_V1724_CH7_RESERVED_ADC_DEBUG_INDEX, CVT_V1724_CH7_RESERVED_MEM_DATA_INDEX, CVT_V1724_CH7_RESERVED_MEM_ADDRESS_INDEX,   CVT_V1724_LAST_INDEX }
	The registers indexes. More...
enum	CVT_V1724_VME_CONTROL_MSK { CVT_V1724_VME_CTRL_INT_LEVEL_MSK = 0x0007, CVT_V1724_VME_CTRL_BERR_ENABLE_MSK = 0x0010, CVT_V1724_VME_CTRL_ALIGN64_MSK = 0x0020, CVT_V1724_VME_CTRL_RELOC_MSK = 0x0040 }
	Control register bitmasks. More...
enum	CVT_V1724_VME_STATUS_MSK { CVT_V1724_VME_STS_DATA_READY_MSK = 0x0001, CVT_V1724_VME_STS_FULL_MSK = 0x0002, CVT_V1724_VME_STS_BERR_FLAG_MSK = 0x0004, CVT_V1724_VME_STS_PURGED_MSK = 0x0008 }
	Status register bitmasks. More...
enum	CVT_V1724_TRIGGER_SRC_ENABLE_MSK {   CVT_V1724_TRGEN_CH0_MSK = 0x00000001, CVT_V1724_TRGEN_CH1_MSK = 0x00000002, CVT_V1724_TRGEN_CH2_MSK = 0x00000004, CVT_V1724_TRGEN_CH3_MSK = 0x00000008,   CVT_V1724_TRGEN_CH4_MSK = 0x00000010, CVT_V1724_TRGEN_CH5_MSK = 0x00000020, CVT_V1724_TRGEN_CH6_MSK = 0x00000040, CVT_V1724_TRGEN_CH7_MSK = 0x00000080,   CVT_V1724_TRGEN_EXT_MSK = 0x40000000, CVT_V1724_TRGEN_SW_MSK = 0x80000000 }
	Trigger enable bitmasks. More...
enum	CVT_V1724_FP_TRIGGER_OUT_ENABLE_MSK {   CVT_V1724_FPTRGEN_CH0_MSK = 0x00000001, CVT_V1724_FPTRGEN_CH1_MSK = 0x00000002, CVT_V1724_FPTRGEN_CH2_MSK = 0x00000004, CVT_V1724_FPTRGEN_CH3_MSK = 0x00000008,   CVT_V1724_FPTRGEN_CH4_MSK = 0x00000010, CVT_V1724_FPTRGEN_CH5_MSK = 0x00000020, CVT_V1724_FPTRGEN_CH6_MSK = 0x00000040, CVT_V1724_FPTRGEN_CH7_MSK = 0x00000080,   CVT_V1724_FPTRGEN_EXT_MSK = 0x40000000, CVT_V1724_FPTRGEN_SW_MSK = 0x80000000 }
	Front Panel Trigger Out enable bitmasks. More...
enum	CVT_V1724_BROAD_CH_CONTROL_MSK {   CVT_V1724_BROAD_CHCTRL_GATE_MODE_MSK = 0x00000001, CVT_V1724_BROAD_CHCTRL_TRG_OVERLAP_MSK = 0x00000002, CVT_V1724_BROAD_CHCTRL_MEM_ENABLE_MSK = 0x00000004, CVT_V1724_BROAD_CHCTRL_MEM_ACC_MODE_MSK = 0x00000010,   CVT_V1724_BROAD_CHCTRL_TRG_IN_EN_MSK = 0x00000020, CVT_V1724_BROAD_CHCTRL_TRG_OUT_THR_MSK = 0x00000040, CVT_V1724_BROAD_CHCTRL_TRG_OUT_EN_MSK = 0x00000080 }
	CVT_V1724_BROAD_CH_CTRL: Control register bitmasks. More...
enum	CVT_V1724_BROAD_CH_RND_ACC_MSK { CVT_V1724_BROAD_CHRNDACC_BLOCK_ADD_MSK = 0x000003FF, CVT_V1724_BROAD_CHRNDACC_SAMPLE_NUM_MSK = 0x003FFC00, CVT_V1724_BROAD_CHRNDACC_OFFSET_MSK = 0xFFC00000 }
	CVT_V1724_BROAD_CH_RND_ACC register bitmasks. More...
enum	CVT_V1724_ACQ_CONTROL_MSK { CVT_V1724_ACQCTRL_ACQ_MODE_MSK = 0x00000003, CVT_V1724_ACQCTRL_START_MSK = 0x00000004, CVT_V1724_ACQCTRL_EVENT_COUNTER_ALL_MSK = 0x00000008, CVT_V1724_ACQCTRL_DOWNSAMPLE_MSK = 0x00000010 }
	CVT_V1724_ACQ_CONTROL register bitmasks. More...
enum	CVT_V1724_ACQ_CONTROL_ACQ_MODES { CVT_V1724_ACQCTRL_ACQ_MODE_REGISTER_CTRL = 0, CVT_V1724_ACQCTRL_ACQ_MODE_S_IN_CTRL = 1, CVT_V1724_ACQCTRL_ACQ_MODE_S_IN_GATE = 2, CVT_V1724_ACQCTRL_ACQ_MODE_MULTIBOARD_SYNC = 3 }
	CVT_V1724_ACQ_CONTROL_MSK acquisition modes. More...
enum	CVT_V1724_ACQ_STATUS_MSK {   CVT_V1724_ACQSTS_MEB_NOT_EMPTY_MSK = 0x00000001, CVT_V1724_ACQSTS_MEB_FULL_MSK = 0x00000002, CVT_V1724_ACQSTS_RUN_MSK = 0x00000004, CVT_V1724_ACQSTS_EVENT_RDY_MSK = 0x00000008,   CVT_V1724_ACQSTS_EVENT_FULL_MSK = 0x00000010, CVT_V1724_ACQSTS_S_IN_MSK = 0x00008000 }
	CVT_V1724_ACQ_STATUS register bitmasks. More...
enum	CVT_V1724_CH_ENABLE_MSK {   CVT_V1724_CHEN_CH0_MSK = 0x0001, CVT_V1724_CHEN_CH1_MSK = 0x0002, CVT_V1724_CHEN_CH2_MSK = 0x0004, CVT_V1724_CHEN_CH3_MSK = 0x0008,   CVT_V1724_CHEN_CH4_MSK = 0x0010, CVT_V1724_CHEN_CH5_MSK = 0x0020, CVT_V1724_CHEN_CH6_MSK = 0x0040, CVT_V1724_CHEN_CH7_MSK = 0x0080 }
	CVT_V1724_CH_ENABLE register bitmasks. More...
enum	CVT_V1724_CH_CONF_MSK { CVT_V1724_CHCONF_DITHER_MSK = 0x00000001, CVT_V1724_CHCONF_CLK_DUTY_STAB_MSK = 0x00000002, CVT_V1724_CHCONF_RND_MSK = 0x00000004 }
	CH Configuration register bitmasks. More...
enum	CVT_V1724_FRONT_PANEL_IO_MSK { CVT_V1724_FPIO_MSK = 0x0000FFFF }
	Front Panel IO data register bitmasks. More...
enum	CVT_V1724_FRONT_PANEL_IO_CTRL_MSK { CVT_V1724_FPIO_CTRL_TTL_MSK = 0x00000001, CVT_V1724_FPIO_CTRL_OUT_DIS_MSK = 0x00000002, CVT_V1724_FPIO_CTRL_DIR_MSK = 0x0000003C, CVT_V1724_FPIO_CTRL_MODE_MSK = 0x000000C0 }
	Front Panel IO control register bitmasks. More...
enum	CVT_V1724_FRONT_PANEL_IO_MODES { CVT_V1724_FPIO_MODES_GPIO = 0, CVT_V1724_FPIO_MODES_PROGIO = 1, CVT_V1724_FPIO_MODES_PATTERN = 2 }
	Front Panel IO modes. More...
enum	CVT_V1724_DAC_CONF_MSK { CVT_V1724_CHDAC_DATA_MSK = 0x0000FFFF, CVT_V1724_CHDAC_SET_A_MSK = 0x00100000, CVT_V1724_CHDAC_SET_B_MSK = 0x00240000 }
	CH DAC data configuration register bitmasks. More...
enum	CVT_V1724_CH_STATUS_MSK {   CVT_V1724_CHSTS_FIFO_FULL_MSK = 0x00000001, CVT_V1724_CHSTS_FIFO_EMPTY_MSK = 0x00000002, CVT_V1724_CHSTS_DAC_BUSY_MSK = 0x00000004, CVT_V1724_CHSTS_BIST_END_MSK = 0x00000008,   CVT_V1724_CHSTS_BIST_OK_MSK = 0x00000010, CVT_V1724_CHSTS_BLOCK_REM_OK_MSK = 0x00000020 }
	CH status register bitmasks. More...
enum	CVT_V1724_CH_BLKSIZE {   CVT_V1724_CHBKSZ_512K = 0, CVT_V1724_CHBKSZ_256K, CVT_V1724_CHBKSZ_128K, CVT_V1724_CHBKSZ_64K,   CVT_V1724_CHBKSZ_32K, CVT_V1724_CHBKSZ_16K, CVT_V1724_CHBKSZ_8K, CVT_V1724_CHBKSZ_4K,   CVT_V1724_CHBKSZ_2K, CVT_V1724_CHBKSZ_1K, CVT_V1724_CHBKSZ_512 }
	The channel Samples' Number for each block. More...
enum	CVT_V1724_MCST_CBLT_ADD_CTRL_MSK { CVT_V1724_MCST_CBLT_ADD_MSK = 0x000000FF, CVT_V1724_MCST_CBLT_CTRL_MSK = 0x00000300 }
	V1724 MCST-CBLT Address/Control register bit masks. More...
enum	CVT_V1724_MCST_CBLT_CTRL_BOARDS { CVT_V1724_MCST_CBLT_CTRL_DISABLED_BOARD = 0, CVT_V1724_MCST_CBLT_CTRL_LAST_BOARD = 1, CVT_V1724_MCST_CBLT_CTRL_FIRST_BOARD = 2, CVT_V1724_MCST_CBLT_CTRL_MID_BOARD = 3 }
	V1724 MCST-CBLT control boards. More...
enum	CVT_V1724_FLASH_OPCODES { CVT_V1724_FOP_PAGE_ERASE = 0x0081, CVT_V1724_FOP_PAGE_PROG_TH_BUF1 = 0x0082, CVT_V1724_FOP_PAGE_READ = 0x00D2 }
	V1724 Flash register opcodes. More...
enum	CVT_V1724_FLASH_BANK { CVT_V1724_FB_STANDARD = 48, CVT_V1724_FB_BACKUP = 1048 }
	V1724 Flash banks. More...
enum	CVT_V1724_FLASH_EN_MSK { CVT_V1724_FLEN_EN_MSK = 0x00000001 }
	Flash enable register bitmasks. More...
Functions
BOOL	cvt_V1724_open (cvt_V1724_data *p_data, UINT16 base_address, long vme_handle)
	V1724 VME boards data initialization.
BOOL	cvt_V1724_close (cvt_V1724_data *p_data)
	V1724 VME boards closing and resource free.
BOOL	cvt_V1724_read_data (cvt_V1724_data *p_data, UINT32 *p_ch_max_samples, UINT32 *p_num_events)
	Reads data from the board's channels and stores to user buffer.
BOOL	cvt_V1724_get_buffer_cache (cvt_V1724_data *p_data, UINT16 event_index, UINT8 ch_index, UINT16 *p_buff, UINT32 *p_buff_size, UINT8 *p_board_id, UINT32 *p_trigger_time_tag, UINT32 *p_event_counter)
	Reads data cache from previous cvt_V1724_read_data data call.
BOOL	cvt_V1724_set_trigger_mode (cvt_V1724_data *p_data, BOOL falling_edge_enable, BOOL trigger_in_enable, BOOL trigger_out_enable, BOOL ext_trigger_enable, BOOL sw_trigger_enable, UINT8 ch_trigger_enable_msk, BOOL trigger_overlap_enable, UINT32 post_trigger)
	Setups the triggering mode parameters.
BOOL	cvt_V1724_get_trigger_mode (cvt_V1724_data *p_data, BOOL *p_falling_edge_enable, BOOL *p_trigger_in_enable, BOOL *p_trigger_out_enable, BOOL *p_ext_trigger_enable, BOOL *p_sw_trigger_enable, UINT8 *p_ch_trigger_enable_msk, BOOL *p_trigger_overlap_enable, UINT32 *p_post_trigger)
	Gets the trigger out settings.
BOOL	cvt_V1724_get_fp_trigger_out (cvt_V1724_data *p_data, BOOL *p_ext_trigger_enable, BOOL *p_sw_trigger_enable, UINT8 *p_ch_trigger_enable_msk)
	Gets the front panel trigger output settings.
BOOL	cvt_V1724_set_fp_trigger_out (cvt_V1724_data *p_data, BOOL ext_trigger_enable, BOOL sw_trigger_enable, UINT8 ch_trigger_enable_msk)
	Setups the front panel triggering output parameters.
BOOL	cvt_V1724_start_acquisition (cvt_V1724_data *p_data, UINT8 ch_msk)
	Starts the acquisition for the spcified channel mask.
BOOL	cvt_V1724_stop_acquisition (cvt_V1724_data *p_data)
	Stops the acquisition.
BOOL	cvt_V1724_set_acquisition_mode (cvt_V1724_data *p_data, BOOL sample_enable, CVT_V1724_CH_BLKSIZE block_size, CVT_V1724_ACQ_CONTROL_ACQ_MODES acquisition_mode, BOOL count_all_trigger, UINT32 downsample_factor)
	Setups the acquisition mode parameters.
BOOL	cvt_V1724_get_acquisition_mode (cvt_V1724_data *p_data, BOOL *p_sample_enable, CVT_V1724_CH_BLKSIZE *p_block_size)
	Gets the acquisition mode parameters.
BOOL	cvt_V1724_get_acquisition_status (cvt_V1724_data *p_data, BOOL *p_is_MEB_not_empty, BOOL *p_is_MEB_full, BOOL *p_is_running, BOOL *p_some_event_ready, BOOL *p_event_full, BOOL *p_s_in)
	Gets the acquisition status parameters.
BOOL	cvt_V1724_set_dither_enable (cvt_V1724_data *p_data, UINT8 ch_msk, BOOL dither_value)
	CH 0 Configuration register index CH 1 Configuration register index CH 2 Configuration register index CH 3 Configuration register index CH 4 Configuration register index CH 5 Configuration register index CH 6 Configuration register index CH 7 Configuration register index.
BOOL	cvt_V1724_get_dither_enable (cvt_V1724_data *p_data, UINT8 ch_index, BOOL *p_dither_value)
	CH 0 Configuration register index CH 1 Configuration register index CH 2 Configuration register index CH 3 Configuration register index CH 4 Configuration register index CH 5 Configuration register index CH 6 Configuration register index CH 7 Configuration register index.
BOOL	cvt_V1724_set_adc_conf (cvt_V1724_data *p_data, UINT8 ch_msk, BOOL dither_value, BOOL clk_duty_stab_value, BOOL randomize_value)
	CH 0 Configuration register index CH 1 Configuration register index CH 2 Configuration register index CH 3 Configuration register index CH 4 Configuration register index CH 5 Configuration register index CH 6 Configuration register index CH 7 Configuration register index.
BOOL	cvt_V1724_get_adc_conf (cvt_V1724_data *p_data, UINT8 ch_index, BOOL *p_dither_value, BOOL *p_clk_duty_stab_value, BOOL *p_randomize_value)
	CH 0 Configuration register index CH 1 Configuration register index CH 2 Configuration register index CH 3 Configuration register index CH 4 Configuration register index CH 5 Configuration register index CH 6 Configuration register index CH 7 Configuration register index.
BOOL	cvt_V1724_set_interrupt (cvt_V1724_data *p_data, UINT8 level, UINT32 status_id, UINT16 event_number)
	Setups interrupt parameters.
BOOL	cvt_V1724_get_interrupt (cvt_V1724_data *p_data, UINT8 *p_level, UINT32 *p_status_id, UINT16 *p_event_number)
	Gets interrupt parameters.
BOOL	cvt_V1724_set_readout_mode (cvt_V1724_data *p_data, BOOL enable_bus_error, UINT32 BLT_event_number)
	Setups data readout mode parameters.
BOOL	cvt_V1724_get_readout_mode (cvt_V1724_data *p_data, BOOL *p_enable_bus_error, UINT32 *p_BLT_event_number)
	Gets data readout mode parameters.
BOOL	cvt_V1724_software_reset (cvt_V1724_data *p_data)
	Performs a software reset.
BOOL	cvt_V1724_data_clear (cvt_V1724_data *p_data)
	Performs a data clear.
BOOL	cvt_V1724_set_channel_offset (cvt_V1724_data *p_data, UINT8 ch_msk, UINT16 offset_value)
	CH 0 DAC Data Configuration register index CH 1 DAC Data Configuration register index CH 2 DAC Data Configuration register index CH 3 DAC Data Configuration register index CH 4 DAC Data Configuration register index CH 5 DAC Data Configuration register index CH 6 DAC Data Configuration register index CH 7 DAC Data Configuration register index.
BOOL	cvt_V1724_get_channel_offset (cvt_V1724_data *p_data, UINT8 ch_index, UINT16 *p_offset_value)
	CH 0 DAC Data Configuration register index CH 1 DAC Data Configuration register index CH 2 DAC Data Configuration register index CH 3 DAC Data Configuration register index CH 4 DAC Data Configuration register index CH 5 DAC Data Configuration register index CH 6 DAC Data Configuration register index CH 7 DAC Data Configuration register index.
BOOL	cvt_V1724_set_channel_trigger (cvt_V1724_data *p_data, UINT8 ch_msk, UINT32 trigger_threshold, UINT32 threshold_samples)
	CH 0 Threshold register index CH 1 Threshold register index CH 2 Threshold register index CH 3 Threshold register index CH 4 Threshold register index CH 5 Threshold register index CH 6 Threshold register index CH 7 Threshold register index CH 0 Over/Under Threshold Samples register index CH 1 Over/Under Threshold Samples register index CH 2 Over/Under Threshold Samples register index CH 3 Over/Under Threshold Samples register index CH 4 Over/Under Threshold Samples register index CH 5 Over/Under Threshold Samples register index CH 6 Over/Under Threshold Samples register index CH 7 Over/Under Threshold Samples register index.
BOOL	cvt_V1724_get_channel_trigger (cvt_V1724_data *p_data, UINT8 ch_index, UINT32 *p_trigger_threshold, UINT32 *p_threshold_samples)
	CH 0 Threshold register index CH 1 Threshold register index CH 2 Threshold register index CH 3 Threshold register index CH 4 Threshold register index CH 5 Threshold register index CH 6 Threshold register index CH 7 Threshold register index CH 0 Over/Under Threshold Samples register index CH 1 Over/Under Threshold Samples register index CH 2 Over/Under Threshold Samples register index CH 3 Over/Under Threshold Samples register index CH 4 Over/Under Threshold Samples register index CH 5 Over/Under Threshold Samples register index CH 6 Over/Under Threshold Samples register index CH 7 Over/Under Threshold Samples register index.
BOOL	cvt_V1724_set_front_panel_IO (cvt_V1724_data *p_data, BOOL use_TTL, BOOL out_en, UINT8 dir_msk, CVT_V1724_FRONT_PANEL_IO_MODES mode)
	Sets front panel's IO.
BOOL	cvt_V1724_get_front_panel_IO (cvt_V1724_data *p_data, BOOL *p_use_TTL, BOOL *p_is_out_en, UINT8 *p_dir_msk, CVT_V1724_FRONT_PANEL_IO_MODES *p_mode)
	Gets front panel's IO.
BOOL	cvt_V1724_software_trigger (cvt_V1724_data *p_data)
	Performs a software trigger.
BOOL	cvt_V1724_get_channel_status (cvt_V1724_data *p_data, UINT8 ch_index, BOOL *p_is_dac_busy, BOOL *p_is_fifo_full, BOOL *p_is_fifo_almost_full, BOOL *p_is_block_remove_ok)
	CH 0 status register relative address CH 1 status register relative address CH 2 status register relative address CH 3 status register relative address CH 4 status register relative address CH 5 status register relative address CH 6 status register relative address CH 7 status register relative address.
BOOL	cvt_V1724_get_system_info (cvt_V1724_data *p_data, UINT16 *p_firmware_rev, CVT_V1724_ROM_CONFIG *p_rom_config)
	Gets board's system information.
BOOL	cvt_V1724_get_channel_info (cvt_V1724_data *p_data, UINT8 ch_index, UINT16 *p_firmware_rev)
	CH 0 firmware revision register relative index CH 1 firmware revision register relative index CH 2 firmware revision register relative index CH 3 firmware revision register relative index CH 4 firmware revision register relative index CH 5 firmware revision register relative index CH 6 firmware revision register relative index CH 7 firmware revision register relative index.
BOOL	cvt_V1724_set_MCST_CBLT (cvt_V1724_data *p_data, UINT8 address, MCST_CBLT_board_pos pos)
	Setups MCST/CBLT parameters for this board.
BOOL	cvt_V1724_get_MCST_CBLT (cvt_V1724_data *p_data, UINT8 *p_address, MCST_CBLT_board_pos *p_pos)
	Gets MCST/CBLT parameters from board.
BOOL	cvt_V1724_write_flash_page (cvt_V1724_data *p_data, const UINT8 *page_buff, UINT32 page_index)
	Writes a page into board's flash.
BOOL	cvt_V1724_read_flash_page (cvt_V1724_data *p_data, UINT8 *page_buff, UINT32 page_index)
	Reads a page from board's flash.
BOOL	cvt_V1724_erase_flash_page (cvt_V1724_data *p_data, UINT32 page_index)
	Erases a board's flash page.
BOOL	cvt_V1724_fw_upgrade (cvt_V1724_data *p_data, const UINT8 *data_buff, UINT32 data_size, CVT_V1724_FLASH_BANK flash_bank, BOOL(*call_back)(UINT32 written_bytes))
	Performs a full flash upgrade onto specific bank (standard or backup).

---

Detailed Description

V1724 VME board definitions.

Author:

NDA

Version:

1.0

Date:

10/2006

Provides methods, properties and defines to handle with V1724 VME boards

Definition in file cvt_V1724.h.

---

Define Documentation

#define V1724_FLASH_PAGE_SIZE   264

V1724 Flash programming V1724 flash page size Definition at line 1112 of file cvt_V1724.h. Referenced by cvt_V1724_write_flash_page().

---

Enumeration Type Documentation

enum CVT_V1724_ACQ_CONTROL_ACQ_MODES

CVT_V1724_ACQ_CONTROL_MSK acquisition modes. Enumerator: CVT_V1724_ACQCTRL_ACQ_MODE_REGISTER_CTRL  Register controlled acquisition mode CVT_V1724_ACQCTRL_ACQ_MODE_S_IN_CTRL  S-IN controlled acquisition mode CVT_V1724_ACQCTRL_ACQ_MODE_S_IN_GATE  S-IN gate acquisition mode CVT_V1724_ACQCTRL_ACQ_MODE_MULTIBOARD_SYNC  Multiboard sync acquisition mode Definition at line 908 of file cvt_V1724.h.

enum CVT_V1724_ACQ_CONTROL_MSK

CVT_V1724_ACQ_CONTROL register bitmasks. Enumerator: CVT_V1724_ACQCTRL_ACQ_MODE_MSK  Acqisition mode msk CVT_V1724_ACQCTRL_START_MSK  0--> Stop acquisition 1--> Start acquisition CVT_V1724_ACQCTRL_EVENT_COUNTER_ALL_MSK  0--> Event counter counts only generated and accepted triggers 1--> Event counter counts all generated triggers CVT_V1724_ACQCTRL_DOWNSAMPLE_MSK  Downsample enable bit Definition at line 892 of file cvt_V1724.h.

enum CVT_V1724_ACQ_STATUS_MSK

CVT_V1724_ACQ_STATUS register bitmasks. Enumerator: CVT_V1724_ACQSTS_MEB_NOT_EMPTY_MSK  MEB not empty bit CVT_V1724_ACQSTS_MEB_FULL_MSK  MEB full bit CVT_V1724_ACQSTS_RUN_MSK  Run status bit CVT_V1724_ACQSTS_EVENT_RDY_MSK  Event ready bit CVT_V1724_ACQSTS_EVENT_FULL_MSK  Event full bit CVT_V1724_ACQSTS_S_IN_MSK  S-IN status bit Definition at line 921 of file cvt_V1724.h.

enum CVT_V1724_BROAD_CH_CONTROL_MSK

CVT_V1724_BROAD_CH_CTRL: Control register bitmasks. Enumerator: CVT_V1724_BROAD_CHCTRL_GATE_MODE_MSK  Gate mode bit ( 0 --> Window mode, 1 --> Single mode ) CVT_V1724_BROAD_CHCTRL_TRG_OVERLAP_MSK  Trigger Overlapping enable bit CVT_V1724_BROAD_CHCTRL_MEM_ENABLE_MSK  Memory chip enable Not stopped bit CVT_V1724_BROAD_CHCTRL_MEM_ACC_MODE_MSK  Memory Access mode bit ( 0 --> random access mode, 1--> sequential access mode) CVT_V1724_BROAD_CHCTRL_TRG_IN_EN_MSK  Trigger input enable bit CVT_V1724_BROAD_CHCTRL_TRG_OUT_THR_MSK  Trigger Output Threshold mode bit ( 0 --> Over, 1 --> Under) CVT_V1724_BROAD_CHCTRL_TRG_OUT_EN_MSK  Trigger Output Generation enable bit Definition at line 854 of file cvt_V1724.h.

enum CVT_V1724_BROAD_CH_RND_ACC_MSK

CVT_V1724_BROAD_CH_RND_ACC register bitmasks. Enumerator: CVT_V1724_BROAD_CHRNDACC_BLOCK_ADD_MSK  Address of Block to be read bits CVT_V1724_BROAD_CHRNDACC_SAMPLE_NUM_MSK  Number of samples to be read bits CVT_V1724_BROAD_CHRNDACC_OFFSET_MSK  Offset of Address Data to be read bits Definition at line 870 of file cvt_V1724.h.

enum CVT_V1724_CH_BLKSIZE

The channel Samples' Number for each block. Enumerator: CVT_V1724_CHBKSZ_512K  2 blocks, 262144 32-bit memory locations (1024K byte/block), 512K samples/block CVT_V1724_CHBKSZ_256K  4 blocks, 131072 32-bit memory locations ( 512K byte/block), 256K samples/block CVT_V1724_CHBKSZ_128K  8 blocks, 65536 32-bit memory locations ( 256K byte/block), 128K samples/block CVT_V1724_CHBKSZ_64K  16 blocks, 32768 32-bit memory locations ( 128K byte/block), 64K samples/block CVT_V1724_CHBKSZ_32K  32 blocks, 16384 32-bit memory locations ( 64K byte/block), 32K samples/block CVT_V1724_CHBKSZ_16K  64 blocks, 8192 32-bit memory locations ( 32K byte/block), 16K samples/block CVT_V1724_CHBKSZ_8K  128 blocks, 4096 32-bit memory locations ( 16K byte/block), 8K samples/block CVT_V1724_CHBKSZ_4K  256 blocks, 2048 32-bit memory locations ( 8K byte/block), 4K samples/block CVT_V1724_CHBKSZ_2K  512 blocks, 1024 32-bit memory locations ( 4K byte/block), 2K samples/block CVT_V1724_CHBKSZ_1K  1024 blocks, 512 32-bit memory locations ( 2K byte/block), 1K samples/block CVT_V1724_CHBKSZ_512  2048 blocks, 256 32-bit memory locations ( 1K byte/block), 512 samples/block Definition at line 1040 of file cvt_V1724.h.

enum CVT_V1724_CH_CONF_MSK

CH Configuration register bitmasks. Enumerator: CVT_V1724_CHCONF_DITHER_MSK  CH ADC Dither bit CVT_V1724_CHCONF_CLK_DUTY_STAB_MSK  CH ADC Clock Duty cycle stabilizer bit CVT_V1724_CHCONF_RND_MSK  CH ADC Output Randomize bit Definition at line 953 of file cvt_V1724.h.

enum CVT_V1724_CH_ENABLE_MSK

CVT_V1724_CH_ENABLE register bitmasks. Enumerator: CVT_V1724_CHEN_CH0_MSK  Enable CH 0 bit CVT_V1724_CHEN_CH1_MSK  Enable CH 1 bit CVT_V1724_CHEN_CH2_MSK  Enable CH 2 bit CVT_V1724_CHEN_CH3_MSK  Enable CH 3 bit CVT_V1724_CHEN_CH4_MSK  Enable CH 4 bit CVT_V1724_CHEN_CH5_MSK  Enable CH 5 bit CVT_V1724_CHEN_CH6_MSK  Enable CH 6 bit CVT_V1724_CHEN_CH7_MSK  Enable CH 7 bit Definition at line 936 of file cvt_V1724.h.

enum CVT_V1724_CH_STATUS_MSK

CH status register bitmasks. Enumerator: CVT_V1724_CHSTS_FIFO_FULL_MSK  CH Descriptor FIFO full Status bit CVT_V1724_CHSTS_FIFO_EMPTY_MSK  CH Descriptor FIFO empty Status bit CVT_V1724_CHSTS_DAC_BUSY_MSK  CH DAC Busy Status bit CVT_V1724_CHSTS_BIST_END_MSK  CH BIST end Status bit CVT_V1724_CHSTS_BIST_OK_MSK  CH BIST result bit CVT_V1724_CHSTS_BLOCK_REM_OK_MSK  CH Block Remove result bit Definition at line 1025 of file cvt_V1724.h.

enum CVT_V1724_DAC_CONF_MSK

CH DAC data configuration register bitmasks. Todo: Bits to define Enumerator: CVT_V1724_CHDAC_DATA_MSK  DAC data bits CVT_V1724_CHDAC_SET_A_MSK  Set data for DAC A CVT_V1724_CHDAC_SET_B_MSK  Set data for DAC B Definition at line 1010 of file cvt_V1724.h.

enum CVT_V1724_FLASH_BANK

V1724 Flash banks. Enumerator: CVT_V1724_FB_STANDARD  V1724 flash standard bank CVT_V1724_FB_BACKUP  V1724 flash backup bank Definition at line 1133 of file cvt_V1724.h.

enum CVT_V1724_FLASH_EN_MSK

Flash enable register bitmasks. Enumerator: CVT_V1724_FLEN_EN_MSK  Flash enable bit Definition at line 1144 of file cvt_V1724.h.

enum CVT_V1724_FLASH_OPCODES

V1724 Flash register opcodes. Enumerator: CVT_V1724_FOP_PAGE_ERASE  V1724 flash page erase CVT_V1724_FOP_PAGE_PROG_TH_BUF1  V1724 flash page write CVT_V1724_FOP_PAGE_READ  V1724 flash page read Definition at line 1120 of file cvt_V1724.h.

enum CVT_V1724_FP_TRIGGER_OUT_ENABLE_MSK

Front Panel Trigger Out enable bitmasks. Enumerator: CVT_V1724_FPTRGEN_CH0_MSK  Enable CH 0 trigger bit CVT_V1724_FPTRGEN_CH1_MSK  Enable CH 1 trigger bit CVT_V1724_FPTRGEN_CH2_MSK  Enable CH 2 trigger bit CVT_V1724_FPTRGEN_CH3_MSK  Enable CH 3 trigger bit CVT_V1724_FPTRGEN_CH4_MSK  Enable CH 4 trigger bit CVT_V1724_FPTRGEN_CH5_MSK  Enable CH 5 trigger bit CVT_V1724_FPTRGEN_CH6_MSK  Enable CH 6 trigger bit CVT_V1724_FPTRGEN_CH7_MSK  Enable CH 7 trigger bit CVT_V1724_FPTRGEN_EXT_MSK  External trigger enable bit CVT_V1724_FPTRGEN_SW_MSK  Software trigger enable bit Definition at line 835 of file cvt_V1724.h.

enum CVT_V1724_FRONT_PANEL_IO_CTRL_MSK

Front Panel IO control register bitmasks. Enumerator: CVT_V1724_FPIO_CTRL_TTL_MSK  TTL/NIM external signal bit CVT_V1724_FPIO_CTRL_OUT_DIS_MSK  Output disable bit CVT_V1724_FPIO_CTRL_DIR_MSK  Direction msk CVT_V1724_FPIO_CTRL_MODE_MSK  Mode msk ( bit 0x00000100 is don't care ) Definition at line 978 of file cvt_V1724.h.

enum CVT_V1724_FRONT_PANEL_IO_MODES

Front Panel IO modes. Enumerator: CVT_V1724_FPIO_MODES_GPIO  General purpose IO CVT_V1724_FPIO_MODES_PROGIO  Programmed IO CVT_V1724_FPIO_MODES_PATTERN  Pattern mode Definition at line 997 of file cvt_V1724.h.

enum CVT_V1724_FRONT_PANEL_IO_MSK

Front Panel IO data register bitmasks. Enumerator: CVT_V1724_FPIO_MSK  IO data value Definition at line 965 of file cvt_V1724.h.

enum CVT_V1724_MCST_CBLT_ADD_CTRL_MSK

V1724 MCST-CBLT Address/Control register bit masks. Enumerator: CVT_V1724_MCST_CBLT_ADD_MSK  Address bits mask CVT_V1724_MCST_CBLT_CTRL_MSK  Control bits mask Definition at line 1081 of file cvt_V1724.h.

enum CVT_V1724_MCST_CBLT_CTRL_BOARDS

V1724 MCST-CBLT control boards. Enumerator: CVT_V1724_MCST_CBLT_CTRL_DISABLED_BOARD  Disabled Board CVT_V1724_MCST_CBLT_CTRL_LAST_BOARD  Last Board CVT_V1724_MCST_CBLT_CTRL_FIRST_BOARD  First Board CVT_V1724_MCST_CBLT_CTRL_MID_BOARD  Middle Board Definition at line 1099 of file cvt_V1724.h.

enum CVT_V1724_REG_INDEX

The registers indexes. Provides an entry for each register: This is the index into the CVT_V1724_REG_TABLE board table Enumerator: CVT_V1724_OUT_BUFFER_INDEX  Output buffer data buffer index. CVT_V1724_BROAD_CH_CTRL_INDEX  Control channel broadcast register index. CVT_V1724_BROAD_CH_SET_CTRL_INDEX  Set control channel broadcast register index. CVT_V1724_BROAD_CH_CLEAR_CTRL_INDEX  Clear control channel broadcast register index. CVT_V1724_BROAD_CH_BUFF_SIZE_INDEX  Buffer size channel broadcast register index. CVT_V1724_BROAD_CH_BUFF_FLUSH_INDEX  Number of buffers to be removed channel broadcast register index. CVT_V1724_BROAD_CH_RND_ACC_INDEX  Parameters to Random access channel broadcast register index. CVT_V1724_ACQ_CONTROL_INDEX  Acquisiton Control register index. CVT_V1724_ACQ_STATUS_INDEX  Acquisiton Status register index. CVT_V1724_SW_TRIGGER_INDEX  Software trigger register index. CVT_V1724_TRIGGER_SRC_ENABLE_INDEX  Trigger source enable register index. CVT_V1724_FP_TRIGGER_OUT_ENABLE_INDEX  Front panel trigger out enable mask register index. CVT_V1724_POST_TRIG_INDEX  Post trigger register index. CVT_V1724_FRONT_PANEL_IO_INDEX  Front panel IO register index. CVT_V1724_FRONT_PANEL_IO_CTRL_INDEX  Front panel IO Control register index. CVT_V1724_CH_ENABLE_INDEX  Channel enable mask register index. CVT_V1724_FW_REV_INDEX  Firmware Revision register index. CVT_V1724_DOWNSAMPLE_FACT_INDEX  DownSample factor register index. CVT_V1724_EVENT_STORED_INDEX  Event stored register index. CVT_V1724_VME_CONTROL_INDEX  VME Control register index. CVT_V1724_VME_STATUS_INDEX  VME Status register index. CVT_V1724_BOARD_ID_INDEX  Geo Address register index. CVT_V1724_MCST_CBLT_ADD_CTRL_INDEX  MCST/CBLT Address and control register index. CVT_V1724_RELOCATION_ADDRESS_INDEX  Relocation address register index. CVT_V1724_INT_STATUS_ID_INDEX  Interrupt status id register index. CVT_V1724_INT_EVENT_NUM_INDEX  Interrupt event number register index. CVT_V1724_BLT_EVENT_NUM_INDEX  BLT event number register index. CVT_V1724_SCRATCH_INDEX  Scratch register index. CVT_V1724_SW_RESET_INDEX  Software reset register index. CVT_V1724_SW_CLEAR_INDEX  Software clear register index. CVT_V1724_FLASH_EN_INDEX  Flash enable index. CVT_V1724_FLASH_DATA_INDEX  Flash data index. CVT_V1724_RELOAD_CONFIG_INDEX  Configuration Reload index. CVT_V1724_BASE_ADDRESS_INDEX  Base Address index. CVT_V1724_ROM_CHKSUM_INDEX  Configuration ROM checksum index. CVT_V1724_ROM_CHKSUM_LEN_2_INDEX  Configuration ROM checksum length (MSB) index. CVT_V1724_ROM_CHKSUM_LEN_1_INDEX  Configuration ROM checksum length index. CVT_V1724_ROM_CHKSUM_LEN_0_INDEX  Configuration ROM checksum length (LSB) index. CVT_V1724_ROM_CONST_2_INDEX  Configuration ROM constant (MSB) index. CVT_V1724_ROM_CONST_1_INDEX  Configuration ROM constant index. CVT_V1724_ROM_CONST_0_INDEX  Configuration ROM constant (LSB) index. CVT_V1724_ROM_C_CODE_INDEX  Configuration ROM c_code index. CVT_V1724_ROM_R_CODE_INDEX  Configuration ROM r_code index. CVT_V1724_ROM_OUI_2_INDEX  Configuration ROM Manufacturer identifier (IEEE OUI) (MSB) index. CVT_V1724_ROM_OUI_1_INDEX  Configuration ROM Manufacturer identifier (IEEE OUI) index. CVT_V1724_ROM_OUI_0_INDEX  Configuration ROM Manufacturer identifier (IEEE OUI) (LSB) index. CVT_V1724_ROM_VERSION_INDEX  Configuration ROM Purchased version of the Mod.V1724 index. CVT_V1724_ROM_BOARD_ID_2_INDEX  Configuration ROM Board identifier (MSB) index. CVT_V1724_ROM_BOARD_ID_1_INDEX  Configuration ROM Board identifier index. CVT_V1724_ROM_BOARD_ID_0_INDEX  Configuration ROM Board identifier (LSB) index. CVT_V1724_ROM_REVISION_3_INDEX  Configuration ROM Hardware revision identifier index. CVT_V1724_ROM_REVISION_2_INDEX  Configuration ROM Hardware revision identifier index. CVT_V1724_ROM_REVISION_1_INDEX  Configuration ROM Hardware revision identifier index. CVT_V1724_ROM_REVISION_0_INDEX  Configuration ROM Hardware revision identifier index. CVT_V1724_ROM_SERIAL_1_INDEX  Configuration ROM Serial number (MSB) index. CVT_V1724_ROM_SERIAL_0_INDEX  Configuration ROM Serial number (LSB) index. CVT_V1724_CH0_RESERVED_RND_ACC_INDEX  CH 0 Read Block channel broadcast reserved register index. CVT_V1724_CH0_THRESHOLD_INDEX  CH 0 Threshold register index. CVT_V1724_CH0_TIME_OVER_UNDER_THR_INDEX  CH 0 Over/Under Threshold Samples register index. CVT_V1724_CH0_STATUS_INDEX  CH 0 status register index. CVT_V1724_CH0_FW_REV_INDEX  CH 0 firmware revision register index. CVT_V1724_CH0_BUFF_OCCUPANCY_INDEX  CH 0 Number of Buffers Filled register index. CVT_V1724_CH0_DAC_CONF_INDEX  CH 0 DAC Data Configuration register index. CVT_V1724_CH0_ADC_CONF_INDEX  CH 0 Configuration register index. CVT_V1724_CH0_RESERVED_ADC_DEBUG_INDEX  CH 0 ADC Debug Reserved register index. CVT_V1724_CH0_RESERVED_MEM_DATA_INDEX  CH 0 Memory test data Reserved register index. CVT_V1724_CH0_RESERVED_MEM_ADDRESS_INDEX  CH 0 Memory test address Reserved register index. CVT_V1724_CH1_RESERVED_RND_ACC_INDEX  CH 1 Read Block channel broadcast reserved register index. CVT_V1724_CH1_THRESHOLD_INDEX  CH 1 Threshold register index. CVT_V1724_CH1_TIME_OVER_UNDER_THR_INDEX  CH 1 Over/Under Threshold Samples register index. CVT_V1724_CH1_STATUS_INDEX  CH 1 status register index. CVT_V1724_CH1_FW_REV_INDEX  CH 1 firmware revision register index. CVT_V1724_CH1_BUFF_OCCUPANCY_INDEX  CH 1 Number of Buffers Filled register index. CVT_V1724_CH1_DAC_CONF_INDEX  CH 1 DAC Data Configuration register index. CVT_V1724_CH1_ADC_CONF_INDEX  CH 1 Configuration register index. CVT_V1724_CH1_RESERVED_ADC_DEBUG_INDEX  CH 1 ADC Debug Reserved register index. CVT_V1724_CH1_RESERVED_MEM_DATA_INDEX  CH 1 Memory test data Reserved register index. CVT_V1724_CH1_RESERVED_MEM_ADDRESS_INDEX  CH 1 Memory test address Reserved register index. CVT_V1724_CH2_RESERVED_RND_ACC_INDEX  CH 2 Read Block channel broadcast reserved register index. CVT_V1724_CH2_THRESHOLD_INDEX  CH 2 Threshold register index. CVT_V1724_CH2_TIME_OVER_UNDER_THR_INDEX  CH 2 Over/Under Threshold Samples register index. CVT_V1724_CH2_STATUS_INDEX  CH 2 status register index. CVT_V1724_CH2_FW_REV_INDEX  CH 2 firmware revision register index. CVT_V1724_CH2_BUFF_OCCUPANCY_INDEX  CH 2 Number of Buffers Filled register index. CVT_V1724_CH2_DAC_CONF_INDEX  CH 2 DAC Data Configuration register index. CVT_V1724_CH2_ADC_CONF_INDEX  CH 2 Configuration register index. CVT_V1724_CH2_RESERVED_ADC_DEBUG_INDEX  CH 2 ADC Debug Reserved register index. CVT_V1724_CH2_RESERVED_MEM_DATA_INDEX  CH 2 Memory test data Reserved register index. CVT_V1724_CH2_RESERVED_MEM_ADDRESS_INDEX  CH 2 Memory test address Reserved register index. CVT_V1724_CH3_RESERVED_RND_ACC_INDEX  CH 3 Read Block channel broadcast reserved register index. CVT_V1724_CH3_THRESHOLD_INDEX  CH 3 Threshold register index. CVT_V1724_CH3_TIME_OVER_UNDER_THR_INDEX  CH 3 Over/Under Threshold Samples register index. CVT_V1724_CH3_STATUS_INDEX  CH 3 status register index. CVT_V1724_CH3_FW_REV_INDEX  CH 3 firmware revision register index. CVT_V1724_CH3_BUFF_OCCUPANCY_INDEX  CH 3 Number of Buffers Filled register index. CVT_V1724_CH3_DAC_CONF_INDEX  CH 3 DAC Data Configuration register index. CVT_V1724_CH3_ADC_CONF_INDEX  CH 3 Configuration register index. CVT_V1724_CH3_RESERVED_ADC_DEBUG_INDEX  CH 3 ADC Debug Reserved register index. CVT_V1724_CH3_RESERVED_MEM_DATA_INDEX  CH 3 Memory test data Reserved register index. CVT_V1724_CH3_RESERVED_MEM_ADDRESS_INDEX  CH 3 Memory test address Reserved register index. CVT_V1724_CH4_RESERVED_RND_ACC_INDEX  CH 4 Read Block channel broadcast reserved register index. CVT_V1724_CH4_THRESHOLD_INDEX  CH 4 Threshold register index. CVT_V1724_CH4_TIME_OVER_UNDER_THR_INDEX  CH 4 Over/Under Threshold Samples register index. CVT_V1724_CH4_STATUS_INDEX  CH 4 status register index. CVT_V1724_CH4_FW_REV_INDEX  CH 4 firmware revision register index. CVT_V1724_CH4_BUFF_OCCUPANCY_INDEX  CH 4 Number of Buffers Filled register index. CVT_V1724_CH4_DAC_CONF_INDEX  CH 4 DAC Data Configuration register index. CVT_V1724_CH4_ADC_CONF_INDEX  CH 4 Configuration register index. CVT_V1724_CH4_RESERVED_ADC_DEBUG_INDEX  CH 4 ADC Debug Reserved register index. CVT_V1724_CH4_RESERVED_MEM_DATA_INDEX  CH 4 Memory test data Reserved register index. CVT_V1724_CH4_RESERVED_MEM_ADDRESS_INDEX  CH 4 Memory test address Reserved register index. CVT_V1724_CH5_RESERVED_RND_ACC_INDEX  CH 5 Read Block channel broadcast reserved register index. CVT_V1724_CH5_THRESHOLD_INDEX  CH 5 Threshold register index. CVT_V1724_CH5_TIME_OVER_UNDER_THR_INDEX  CH 5 Over/Under Threshold Samples register index. CVT_V1724_CH5_STATUS_INDEX  CH 5 status register index. CVT_V1724_CH5_FW_REV_INDEX  CH 5 firmware revision register index. CVT_V1724_CH5_BUFF_OCCUPANCY_INDEX  CH 5 Number of Buffers Filled register index. CVT_V1724_CH5_DAC_CONF_INDEX  CH 5 DAC Data Configuration register index. CVT_V1724_CH5_ADC_CONF_INDEX  CH 5 Configuration register index. CVT_V1724_CH5_RESERVED_ADC_DEBUG_INDEX  CH 5 ADC Debug Reserved register index. CVT_V1724_CH5_RESERVED_MEM_DATA_INDEX  CH 5 Memory test data Reserved register index. CVT_V1724_CH5_RESERVED_MEM_ADDRESS_INDEX  CH 5 Memory test address Reserved register index. CVT_V1724_CH6_RESERVED_RND_ACC_INDEX  CH 6 Read Block channel broadcast reserved register index. CVT_V1724_CH6_THRESHOLD_INDEX  CH 6 Threshold register index. CVT_V1724_CH6_TIME_OVER_UNDER_THR_INDEX  CH 6 Over/Under Threshold Samples register index. CVT_V1724_CH6_STATUS_INDEX  CH 6 status register index. CVT_V1724_CH6_FW_REV_INDEX  CH 6 firmware revision register index. CVT_V1724_CH6_BUFF_OCCUPANCY_INDEX  CH 6 Number of Buffers Filled register index. CVT_V1724_CH6_DAC_CONF_INDEX  CH 6 DAC Data Configuration register index. CVT_V1724_CH6_ADC_CONF_INDEX  CH 6 Configuration register index. CVT_V1724_CH6_RESERVED_ADC_DEBUG_INDEX  CH 6 ADC Debug Reserved register index. CVT_V1724_CH6_RESERVED_MEM_DATA_INDEX  CH 6 Memory test data Reserved register index. CVT_V1724_CH6_RESERVED_MEM_ADDRESS_INDEX  CH 6 Memory test address Reserved register index. CVT_V1724_CH7_RESERVED_RND_ACC_INDEX  CH 7 Read Block channel broadcast reserved register index. CVT_V1724_CH7_THRESHOLD_INDEX  CH 7 Threshold register index. CVT_V1724_CH7_TIME_OVER_UNDER_THR_INDEX  CH 7 Over/Under Threshold Samples register index. CVT_V1724_CH7_STATUS_INDEX  CH 7 status register index. CVT_V1724_CH7_FW_REV_INDEX  CH 7 firmware revision register index. CVT_V1724_CH7_BUFF_OCCUPANCY_INDEX  CH 7 Number of Buffers Filled register index. CVT_V1724_CH7_DAC_CONF_INDEX  CH 7 DAC Data Configuration register index. CVT_V1724_CH7_ADC_CONF_INDEX  CH 7 Configuration register index. CVT_V1724_CH7_RESERVED_ADC_DEBUG_INDEX  CH 7 ADC Debug Reserved register index. CVT_V1724_CH7_RESERVED_MEM_DATA_INDEX  CH 7 Memory test data Reserved register index. CVT_V1724_CH7_RESERVED_MEM_ADDRESS_INDEX  CH 7 Memory test address Reserved register index. CVT_V1724_LAST_INDEX  Tag : just to get table index size. Definition at line 594 of file cvt_V1724.h.

enum CVT_V1724_TRIGGER_SRC_ENABLE_MSK

Trigger enable bitmasks. Enumerator: CVT_V1724_TRGEN_CH0_MSK  Enable CH 0 trigger bit CVT_V1724_TRGEN_CH1_MSK  Enable CH 1 trigger bit CVT_V1724_TRGEN_CH2_MSK  Enable CH 2 trigger bit CVT_V1724_TRGEN_CH3_MSK  Enable CH 3 trigger bit CVT_V1724_TRGEN_CH4_MSK  Enable CH 4 trigger bit CVT_V1724_TRGEN_CH5_MSK  Enable CH 5 trigger bit CVT_V1724_TRGEN_CH6_MSK  Enable CH 6 trigger bit CVT_V1724_TRGEN_CH7_MSK  Enable CH 7 trigger bit CVT_V1724_TRGEN_EXT_MSK  External trigger enable bit CVT_V1724_TRGEN_SW_MSK  Software trigger enable bit Definition at line 816 of file cvt_V1724.h.

enum CVT_V1724_VME_CONTROL_MSK

Control register bitmasks. Enumerator: CVT_V1724_VME_CTRL_INT_LEVEL_MSK  Interrupt level bit masks CVT_V1724_VME_CTRL_BERR_ENABLE_MSK  Bus error enable bit CVT_V1724_VME_CTRL_ALIGN64_MSK  Align 64 enable bit CVT_V1724_VME_CTRL_RELOC_MSK  Reloc bit Definition at line 786 of file cvt_V1724.h.

enum CVT_V1724_VME_STATUS_MSK

Status register bitmasks. Todo: To be defined Enumerator: CVT_V1724_VME_STS_DATA_READY_MSK  Data ready bit CVT_V1724_VME_STS_FULL_MSK  Full bit CVT_V1724_VME_STS_BERR_FLAG_MSK  Berr flag bit CVT_V1724_VME_STS_PURGED_MSK  Purged bit Definition at line 803 of file cvt_V1724.h.

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Function Documentation

BOOL cvt_V1724_close (  cvt_V1724_data *  p_data  )

V1724 VME boards closing and resource free. Provides specific handling for V1724 boards closing. Parameters: p_data  Pointer to board data Returns: TRUE: board successfully closed Note: Must be called when done with any other board specific API. Definition at line 255 of file cvt_v1724.c. References cvt_board_close(), FALSE, cvt_V1724_data::m_cache_sample_buffer, cvt_V1724_data::m_cache_sample_buffer_read_bytes, cvt_V1724_data::m_cache_sample_buffer_size, cvt_V1724_data::m_common_data, and TRUE.

BOOL cvt_V1724_data_clear (  cvt_V1724_data *  p_data  )

Performs a data clear. Writes a dummy value into SW_CLEAR_REGISTER register. Parameters: p_data  Pointer to board data Returns: TRUE: Procedure successfully executed Definition at line 1371 of file cvt_v1724.c. References CVT_V1724_SW_CLEAR_INDEX, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_erase_flash_page (  cvt_V1724_data *  p_data, UINT32  page_index )

Erases a board's flash page. Parameters: p_data  Pointer to board data. page_index  The page index (0 based index) to be erased Returns: TRUE: Procedure successfully executed Definition at line 2222 of file cvt_v1724.c. References cvt_clear_bitmask_reg(), cvt_set_bitmask_reg(), CVT_V1724_FLASH_DATA_INDEX, CVT_V1724_FLASH_EN_INDEX, CVT_V1724_FLEN_EN_MSK, CVT_V1724_FOP_PAGE_ERASE, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_fw_upgrade (  cvt_V1724_data *  p_data, const UINT8 *  data_buff, UINT32  data_size, CVT_V1724_FLASH_BANK  flash_bank, BOOL(*)(UINT32 written_bytes)  call_back )

Performs a full flash upgrade onto specific bank (standard or backup). Parameters: p_data  Pointer to board data. data_buff  The source data buffer data_size  The data_buff size (bytes) flash_bank  The flash bank to upgrade: must be a CVT_V1724_FLASH_BANK valid one call_back  End user call back function, called for each new page transferred: may be NULL: return FALSE to abort procedure Returns: TRUE: Procedure successfully executed Definition at line 2283 of file cvt_v1724.c. References cvt_swap_bits(), CVT_V1724_FB_BACKUP, CVT_V1724_FB_STANDARD, cvt_V1724_write_flash_page(), FALSE, and TRACE.

BOOL cvt_V1724_get_acquisition_mode (  cvt_V1724_data *  p_data, BOOL *  p_sample_enable, CVT_V1724_CH_BLKSIZE *  p_block_size )

Gets the acquisition mode parameters. Retrives the relevant parameters settings for the acquisition mode. Parameters: p_data  Pointer to board data p_sample_enable  Sample acquisition mode: if disabled the acquisition mode is windowed p_block_size  Samples' number per block size foreach channel: it must be a valid CVT_V1724_CH_BLKSIZE identifier. Returns: TRUE: Procedure successfully executed See also: CVT_V1724_CH_BLKSIZE Definition at line 794 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_BROAD_CH_BUFF_SIZE_INDEX, CVT_V1724_BROAD_CH_CTRL_INDEX, CVT_V1724_BROAD_CHCTRL_GATE_MODE_MSK, FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_get_acquisition_status (  cvt_V1724_data *  p_data, BOOL *  p_is_MEB_not_empty, BOOL *  p_is_MEB_full, BOOL *  p_is_running, BOOL *  p_some_event_ready, BOOL *  p_event_full, BOOL *  p_s_in )

Gets the acquisition status parameters. Retrives the relevant parameters for the acquisition status. Parameters: p_data  Pointer to board data p_is_MEB_not_empty  This flag is set if MEB is not empty p_is_MEB_full  This flag is set if MEB is full p_is_running  This flag is set if acquisition is running p_some_event_ready  This flag is set if some event is ready p_event_full  This flag is set if event memory is full p_s_in  This flag shows the front panel' S-IN signal logical state Returns: TRUE: Procedure successfully executed Definition at line 823 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_ACQ_STATUS_INDEX, CVT_V1724_ACQSTS_EVENT_FULL_MSK, CVT_V1724_ACQSTS_EVENT_RDY_MSK, CVT_V1724_ACQSTS_MEB_FULL_MSK, CVT_V1724_ACQSTS_MEB_NOT_EMPTY_MSK, CVT_V1724_ACQSTS_RUN_MSK, CVT_V1724_ACQSTS_S_IN_MSK, FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_get_adc_conf (  cvt_V1724_data *  p_data, UINT8  ch_index, BOOL *  p_dither_value, BOOL *  p_clk_duty_stab_value, BOOL *  p_randomize_value )

CH 0 Configuration register index CH 1 Configuration register index CH 2 Configuration register index CH 3 Configuration register index CH 4 Configuration register index CH 5 Configuration register index CH 6 Configuration register index CH 7 Configuration register index. < < < < < < < < Definition at line 1142 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_CH0_ADC_CONF_INDEX, CVT_V1724_CH1_ADC_CONF_INDEX, CVT_V1724_CH2_ADC_CONF_INDEX, CVT_V1724_CH3_ADC_CONF_INDEX, CVT_V1724_CH4_ADC_CONF_INDEX, CVT_V1724_CH5_ADC_CONF_INDEX, CVT_V1724_CH6_ADC_CONF_INDEX, CVT_V1724_CH7_ADC_CONF_INDEX, CVT_V1724_CHCONF_CLK_DUTY_STAB_MSK, CVT_V1724_CHCONF_DITHER_MSK, CVT_V1724_CHCONF_RND_MSK, CVT_V1724_MAX_CHANNEL, FALSE, cvt_V1724_data::m_common_data, TRACE, TRACE1, and TRUE.

BOOL cvt_V1724_get_buffer_cache (  cvt_V1724_data *  p_data, UINT16  event_index, UINT8  ch_index, UINT16 *  p_buff, UINT32 *  p_buff_size, UINT8 *  p_board_id, UINT32 *  p_trigger_time_tag, UINT32 *  p_event_counter )

Reads data cache from previous cvt_V1724_read_data data call. Call cvt_FIFO_BLT_read for Multiple Event Buffer and stores data into user buffer. If the returned data is just a V1724 not valid datum, this is discarded. Parameters: p_data  Pointer to board data event_index  The event index from which retrive data ch_index  The channel index p_buff  The target buffer: caller allocated p_buff_size  The buffer size (16 bit word). On exit will holds the number of words really read. p_board_id  The board id stored into event p_trigger_time_tag  The trigger time tag stored into event p_event_counter  The counter stored into event Returns: TRUE: Procedure successfully executed, FALSE elsewhere (e.g. event or channel index not found) See also: cvt_V1724_read_data Definition at line 378 of file cvt_v1724.c. References CVT_V1724_MAX_CHANNEL, FALSE, and cvt_V1724_data::m_cache_sample_buffer.

BOOL cvt_V1724_get_channel_info (  cvt_V1724_data *  p_data, UINT8  ch_index, UINT16 *  p_firmware_rev )

CH 0 firmware revision register relative index CH 1 firmware revision register relative index CH 2 firmware revision register relative index CH 3 firmware revision register relative index CH 4 firmware revision register relative index CH 5 firmware revision register relative index CH 6 firmware revision register relative index CH 7 firmware revision register relative index. < < < < < < < < Definition at line 1943 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_CH0_FW_REV_INDEX, CVT_V1724_CH1_FW_REV_INDEX, CVT_V1724_CH2_FW_REV_INDEX, CVT_V1724_CH3_FW_REV_INDEX, CVT_V1724_CH4_FW_REV_INDEX, CVT_V1724_CH5_FW_REV_INDEX, CVT_V1724_CH6_FW_REV_INDEX, CVT_V1724_CH7_FW_REV_INDEX, CVT_V1724_MAX_CHANNEL, FALSE, cvt_V1724_data::m_common_data, TRACE1, and TRUE.

BOOL cvt_V1724_get_channel_offset (  cvt_V1724_data *  p_data, UINT8  ch_index, UINT16 *  p_offset_value )

CH 0 DAC Data Configuration register index CH 1 DAC Data Configuration register index CH 2 DAC Data Configuration register index CH 3 DAC Data Configuration register index CH 4 DAC Data Configuration register index CH 5 DAC Data Configuration register index CH 6 DAC Data Configuration register index CH 7 DAC Data Configuration register index. < < < < < < < < Definition at line 1449 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_CH0_DAC_CONF_INDEX, CVT_V1724_CH1_DAC_CONF_INDEX, CVT_V1724_CH2_DAC_CONF_INDEX, CVT_V1724_CH3_DAC_CONF_INDEX, CVT_V1724_CH4_DAC_CONF_INDEX, CVT_V1724_CH5_DAC_CONF_INDEX, CVT_V1724_CH6_DAC_CONF_INDEX, CVT_V1724_CH7_DAC_CONF_INDEX, CVT_V1724_GET_CH_DAC_CONF, cvt_V1724_get_channel_status(), CVT_V1724_MAX_CHANNEL, FALSE, cvt_V1724_data::m_common_data, TRACE, TRACE1, and TRUE.

BOOL cvt_V1724_get_channel_status (  cvt_V1724_data *  p_data, UINT8  ch_index, BOOL *  p_is_dac_busy, BOOL *  p_is_fifo_full, BOOL *  p_is_fifo_empty, BOOL *  p_is_block_remove_ok )

CH 0 status register relative address CH 1 status register relative address CH 2 status register relative address CH 3 status register relative address CH 4 status register relative address CH 5 status register relative address CH 6 status register relative address CH 7 status register relative address. < < < < < < < < Definition at line 1723 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_CH0_STATUS_INDEX, CVT_V1724_CH1_STATUS_INDEX, CVT_V1724_CH2_STATUS_INDEX, CVT_V1724_CH3_STATUS_INDEX, CVT_V1724_CH4_STATUS_INDEX, CVT_V1724_CH5_STATUS_INDEX, CVT_V1724_CH6_STATUS_INDEX, CVT_V1724_CH7_STATUS_INDEX, CVT_V1724_CHSTS_BLOCK_REM_OK_MSK, CVT_V1724_CHSTS_DAC_BUSY_MSK, CVT_V1724_CHSTS_FIFO_EMPTY_MSK, CVT_V1724_CHSTS_FIFO_FULL_MSK, CVT_V1724_MAX_CHANNEL, FALSE, cvt_V1724_data::m_common_data, TRACE1, and TRUE. Referenced by cvt_V1724_get_channel_offset(), and cvt_V1724_set_channel_offset().

BOOL cvt_V1724_get_channel_trigger (  cvt_V1724_data *  p_data, UINT8  ch_index, UINT32 *  p_trigger_threshold, UINT32 *  p_threshold_samples )

CH 0 Threshold register index CH 1 Threshold register index CH 2 Threshold register index CH 3 Threshold register index CH 4 Threshold register index CH 5 Threshold register index CH 6 Threshold register index CH 7 Threshold register index CH 0 Over/Under Threshold Samples register index CH 1 Over/Under Threshold Samples register index CH 2 Over/Under Threshold Samples register index CH 3 Over/Under Threshold Samples register index CH 4 Over/Under Threshold Samples register index CH 5 Over/Under Threshold Samples register index CH 6 Over/Under Threshold Samples register index CH 7 Over/Under Threshold Samples register index. < < < < < < < < < < < < < < < < Definition at line 1571 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_CH0_THRESHOLD_INDEX, CVT_V1724_CH0_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH1_THRESHOLD_INDEX, CVT_V1724_CH1_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH2_THRESHOLD_INDEX, CVT_V1724_CH2_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH3_THRESHOLD_INDEX, CVT_V1724_CH3_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH4_THRESHOLD_INDEX, CVT_V1724_CH4_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH5_THRESHOLD_INDEX, CVT_V1724_CH5_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH6_THRESHOLD_INDEX, CVT_V1724_CH6_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH7_THRESHOLD_INDEX, CVT_V1724_CH7_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_MAX_CHANNEL, FALSE, cvt_V1724_data::m_common_data, TRACE, TRACE1, and TRUE.

BOOL cvt_V1724_get_dither_enable (  cvt_V1724_data *  p_data, UINT8  ch_index, BOOL *  p_dither_value )

CH 0 Configuration register index CH 1 Configuration register index CH 2 Configuration register index CH 3 Configuration register index CH 4 Configuration register index CH 5 Configuration register index CH 6 Configuration register index CH 7 Configuration register index. < < < < < < < < Definition at line 1033 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_CH0_ADC_CONF_INDEX, CVT_V1724_CH1_ADC_CONF_INDEX, CVT_V1724_CH2_ADC_CONF_INDEX, CVT_V1724_CH3_ADC_CONF_INDEX, CVT_V1724_CH4_ADC_CONF_INDEX, CVT_V1724_CH5_ADC_CONF_INDEX, CVT_V1724_CH6_ADC_CONF_INDEX, CVT_V1724_CH7_ADC_CONF_INDEX, CVT_V1724_CHCONF_DITHER_MSK, CVT_V1724_MAX_CHANNEL, FALSE, cvt_V1724_data::m_common_data, TRACE, TRACE1, and TRUE.

BOOL cvt_V1724_get_fp_trigger_out (  cvt_V1724_data *  p_data, BOOL *  p_ext_trigger_enable, BOOL *  p_sw_trigger_enable, UINT8 *  p_ch_trigger_enable_msk )

Gets the front panel trigger output settings. < Enable CH 0 trigger bit < Enable CH 1 trigger bit < Enable CH 2 trigger bit < Enable CH 3 trigger bit < Enable CH 4 trigger bit < Enable CH 5 trigger bit < Enable CH 6 trigger bit < Enable CH 7 trigger bit Definition at line 934 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_FP_TRIGGER_OUT_ENABLE_INDEX, CVT_V1724_FPTRGEN_CH0_MSK, CVT_V1724_FPTRGEN_CH1_MSK, CVT_V1724_FPTRGEN_CH2_MSK, CVT_V1724_FPTRGEN_CH3_MSK, CVT_V1724_FPTRGEN_CH4_MSK, CVT_V1724_FPTRGEN_CH5_MSK, CVT_V1724_FPTRGEN_CH6_MSK, CVT_V1724_FPTRGEN_CH7_MSK, CVT_V1724_FPTRGEN_EXT_MSK, CVT_V1724_FPTRGEN_SW_MSK, CVT_V1724_MAX_CHANNEL, FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_get_front_panel_IO (  cvt_V1724_data *  p_data, BOOL *  p_use_TTL, BOOL *  p_is_out_en, UINT8 *  p_dir_msk, CVT_V1724_FRONT_PANEL_IO_MODES *  p_mode )

Gets front panel's IO. Retrives the relevant parameters for the front panel's IO. Parameters: p_data  Pointer to board data p_use_TTL  True if the external signals standard is TTL type p_is_out_en  True if the trigger output is enabled p_dir_msk  Gets the direction mask p_mode  Gets the operational mode Returns: TRUE: Procedure successfully executed See also: CVT_V1724_FRONT_PANEL_IO_MODES Definition at line 1671 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_FPIO_CTRL_OUT_DIS_MSK, CVT_V1724_FPIO_CTRL_TTL_MSK, CVT_V1724_FRONT_PANEL_IO_CTRL_INDEX, CVT_V1724_GET_FPIO_CTRL_DIR, CVT_V1724_GET_FPIO_CTRL_MODE, FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_get_interrupt (  cvt_V1724_data *  p_data, UINT8 *  p_level, UINT32 *  p_status_id, UINT16 *  p_event_number )

Gets interrupt parameters. Retrives the relevant parameters settings for interrupt usage. Parameters: p_data  Pointer to board data p_level  The interrupt level. p_status_id  The interrupt stayus id (interupt vector). p_event_number  The number of events to get an interrupt (if 0 interrupt feature is disabled). Returns: TRUE: Procedure successfully executed Definition at line 1240 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_GET_INT_LEVEL, CVT_V1724_INT_EVENT_NUM_INDEX, CVT_V1724_INT_STATUS_ID_INDEX, CVT_V1724_VME_CONTROL_INDEX, FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_get_MCST_CBLT (  cvt_V1724_data *  p_data, UINT8 *  p_address, MCST_CBLT_board_pos *  p_pos )

Gets MCST/CBLT parameters from board. Retrives the relevant parameters for MCST/CBLT usage. Parameters: p_data  Pointer to board data. p_address  The MCST/CBLT address. p_pos  The board position into the MCST / CBLT chain: it must be a MCST_CBLT_board_pos identifier Returns: TRUE: Procedure successfully executed See also: MCST_CBLT_board_pos Definition at line 2021 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_GET_MCST_CBLT_ADD, CVT_V1724_GET_MCST_CBLT_CTRL, CVT_V1724_MCST_CBLT_ADD_CTRL_INDEX, CVT_V1724_MCST_CBLT_CTRL_DISABLED_BOARD, CVT_V1724_MCST_CBLT_CTRL_FIRST_BOARD, CVT_V1724_MCST_CBLT_CTRL_LAST_BOARD, CVT_V1724_MCST_CBLT_CTRL_MID_BOARD, FALSE, cvt_V1724_data::m_common_data, MCST_CBLT_board_disabled, MCST_CBLT_board_pos_first, MCST_CBLT_board_pos_last, MCST_CBLT_board_pos_mid, TRACE, TRACE1, and TRUE.

BOOL cvt_V1724_get_readout_mode (  cvt_V1724_data *  p_data, BOOL *  p_enable_bus_error, UINT32 *  p_BLT_event_number )

Gets data readout mode parameters. Retrives the relevant parameters settings for data readout. Parameters: p_data  Pointer to board data *p_enable_bus_error  Bus error status: if TRUE the module is enabled to generate a Bus error to finish a block transfer. *p_BLT_event_number  The number of events to readout foreach BLT cycle. Returns: TRUE: Procedure successfully executed Definition at line 1326 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_BLT_EVENT_NUM_INDEX, CVT_V1724_VME_CONTROL_INDEX, CVT_V1724_VME_CTRL_BERR_ENABLE_MSK, FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_get_system_info (  cvt_V1724_data *  p_data, UINT16 *  p_firmware_rev, CVT_V1724_ROM_CONFIG *  p_rom_config )

Gets board's system information. Reads the firmware revision register and the serial number. Parameters: p_data  Pointer to board data p_firmware_rev  The firmare release (MSB major release, LSB minor release). p_rom_config  The ROM configuration. Returns: TRUE: Procedure successfully executed Definition at line 1763 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_FW_REV_INDEX, CVT_V1724_ROM_BOARD_ID_0_INDEX, CVT_V1724_ROM_BOARD_ID_1_INDEX, CVT_V1724_ROM_BOARD_ID_2_INDEX, CVT_V1724_ROM_C_CODE_INDEX, CVT_V1724_ROM_CHKSUM_INDEX, CVT_V1724_ROM_CHKSUM_LEN_0_INDEX, CVT_V1724_ROM_CHKSUM_LEN_1_INDEX, CVT_V1724_ROM_CHKSUM_LEN_2_INDEX, CVT_V1724_ROM_CONST_0_INDEX, CVT_V1724_ROM_CONST_1_INDEX, CVT_V1724_ROM_CONST_2_INDEX, CVT_V1724_ROM_OUI_0_INDEX, CVT_V1724_ROM_OUI_1_INDEX, CVT_V1724_ROM_OUI_2_INDEX, CVT_V1724_ROM_R_CODE_INDEX, CVT_V1724_ROM_REVISION_0_INDEX, CVT_V1724_ROM_REVISION_1_INDEX, CVT_V1724_ROM_REVISION_2_INDEX, CVT_V1724_ROM_REVISION_3_INDEX, CVT_V1724_ROM_SERIAL_0_INDEX, CVT_V1724_ROM_SERIAL_1_INDEX, CVT_V1724_ROM_VERSION_INDEX, FALSE, CVT_V1724_ROM_CONFIG::m_board_id, CVT_V1724_ROM_CONFIG::m_c_code, CVT_V1724_ROM_CONFIG::m_chksum, CVT_V1724_ROM_CONFIG::m_chksum_len, cvt_V1724_data::m_common_data, CVT_V1724_ROM_CONFIG::m_const, CVT_V1724_ROM_CONFIG::m_OUI, CVT_V1724_ROM_CONFIG::m_r_code, CVT_V1724_ROM_CONFIG::m_revision, CVT_V1724_ROM_CONFIG::m_serial, CVT_V1724_ROM_CONFIG::m_version, TRACE, and TRUE.

BOOL cvt_V1724_get_trigger_mode (  cvt_V1724_data *  p_data, BOOL *  p_falling_edge_enable, BOOL *  p_trigger_in_enable, BOOL *  p_trigger_out_enable, BOOL *  p_ext_trigger_enable, BOOL *  p_sw_trigger_enable, UINT8 *  p_ch_trigger_enable_msk, BOOL *  p_trigger_overlap_enable, UINT32 *  p_post_trigger )

Gets the trigger out settings. < Enable CH 0 trigger bit < Enable CH 1 trigger bit < Enable CH 2 trigger bit < Enable CH 3 trigger bit < Enable CH 4 trigger bit < Enable CH 5 trigger bit < Enable CH 6 trigger bit < Enable CH 7 trigger bit Definition at line 564 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_BROAD_CH_CTRL_INDEX, CVT_V1724_BROAD_CHCTRL_TRG_IN_EN_MSK, CVT_V1724_BROAD_CHCTRL_TRG_OUT_EN_MSK, CVT_V1724_BROAD_CHCTRL_TRG_OUT_THR_MSK, CVT_V1724_BROAD_CHCTRL_TRG_OVERLAP_MSK, CVT_V1724_MAX_CHANNEL, CVT_V1724_TRGEN_CH0_MSK, CVT_V1724_TRGEN_CH1_MSK, CVT_V1724_TRGEN_CH2_MSK, CVT_V1724_TRGEN_CH3_MSK, CVT_V1724_TRGEN_CH4_MSK, CVT_V1724_TRGEN_CH5_MSK, CVT_V1724_TRGEN_CH6_MSK, CVT_V1724_TRGEN_CH7_MSK, CVT_V1724_TRGEN_EXT_MSK, CVT_V1724_TRGEN_SW_MSK, CVT_V1724_TRIGGER_SRC_ENABLE_INDEX, FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_open (  cvt_V1724_data *  p_data, UINT16  base_address, long  vme_handle )

V1724 VME boards data initialization. Provides specific handling for V1724 boards opening. Parameters: p_data  Pointer to board data base_address  The board base address (MSW) vme_handle  The VME handle Returns: TRUE: board successfully opened Note: Must be called before any other board specific API. Definition at line 233 of file cvt_v1724.c. References cvt_board_open(), CVT_V1724_MAX_CHANNEL, cvt_V1724_set_MCST_CBLT(), FALSE, cvt_V1724_data::m_cache_sample_buffer, cvt_V1724_data::m_cache_sample_buffer_read_bytes, cvt_V1724_data::m_cache_sample_buffer_size, cvt_V1724_data::m_common_data, cvt_board_data::set_MCST_CBLT, and TRUE.

BOOL cvt_V1724_read_data (  cvt_V1724_data *  p_data, UINT32 *  p_ch_max_samples, UINT32 *  p_num_events )

Reads data from the board's channels and stores to user buffer. Call cvt_V1724_read_data once : this will cache the channels' data into internal buffer Then call cvt_V1724_get_buffer_cache to get cached data Parameters: p_data  Pointer to board data p_ch_max_samples  returns the maximum number of samples per channel read for each event p_num_events  returns the number of events read Returns: TRUE: Procedure successfully executed See also: cvt_V1724_get_buffer_cache Definition at line 291 of file cvt_v1724.c. References cvt_FIFO_BLT_read(), cvt_read_reg(), CVT_V1724_EVENT_STORED_INDEX, CVT_V1724_MAX_BLT_EVENT_NUM, CVT_V1724_MAX_CHANNEL, CVT_V1724_OUT_BUFFER_ADD, CVT_V1724_OUT_BUFFER_AM, CVT_V1724_OUT_BUFFER_DATA_SIZE, FALSE, IS_HEADER_TAG, cvt_V1724_data::m_cache_sample_buffer, cvt_V1724_data::m_cache_sample_buffer_read_bytes, cvt_V1724_data::m_cache_sample_buffer_size, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_read_flash_page (  cvt_V1724_data *  p_data, UINT8 *  page_buff, UINT32  page_index )

Reads a page from board's flash. Parameters: p_data  Pointer to board data. page_buff  The target page buffer: page_buff size must be V1724_FLASH_PAGE_SIZE and allocated by the caller page_index  The page index (0 based index) to be read Returns: TRUE: Procedure successfully executed Definition at line 2134 of file cvt_v1724.c. References cvt_clear_bitmask_reg(), CVT_V1724_FLASH_DATA_INDEX, CVT_V1724_FLASH_EN_INDEX, CVT_V1724_FLEN_EN_MSK, CVT_V1724_FOP_PAGE_READ, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_set_acquisition_mode (  cvt_V1724_data *  p_data, BOOL  sample_enable, CVT_V1724_CH_BLKSIZE  block_size, CVT_V1724_ACQ_CONTROL_ACQ_MODES  acquisition_mode, BOOL  count_all_trigger, UINT32  downsample_factor )

Setups the acquisition mode parameters. < 2048 blocks, 256 32-bit memory locations ( 1K byte/block), 512 samples/block < 1024 blocks, 512 32-bit memory locations ( 2K byte/block), 1K samples/block < 512 blocks, 1024 32-bit memory locations ( 4K byte/block), 2K samples/block < 256 blocks, 2048 32-bit memory locations ( 8K byte/block), 4K samples/block < 128 blocks, 4096 32-bit memory locations ( 16K byte/block), 8K samples/block < 64 blocks, 8192 32-bit memory locations ( 32K byte/block), 16K samples/block < 32 blocks, 16384 32-bit memory locations ( 64K byte/block), 32K samples/block < 16 blocks, 32768 32-bit memory locations ( 128K byte/block), 64K samples/block < 8 blocks, 65536 32-bit memory locations ( 256K byte/block), 128K samples/block < 4 blocks, 131072 32-bit memory locations ( 512K byte/block), 256K samples/block < 2 blocks, 262144 32-bit memory locations (1024K byte/block), 512K samples/block Definition at line 688 of file cvt_v1724.c. References cvt_set_bitmask_reg(), CVT_V1724_ACQ_CONTROL_INDEX, CVT_V1724_ACQCTRL_ACQ_MODE_MSK, CVT_V1724_ACQCTRL_DOWNSAMPLE_MSK, CVT_V1724_ACQCTRL_EVENT_COUNTER_ALL_MSK, CVT_V1724_BROAD_CH_BUFF_SIZE_INDEX, CVT_V1724_BROAD_CH_CLEAR_CTRL_INDEX, CVT_V1724_BROAD_CH_SET_CTRL_INDEX, CVT_V1724_BROAD_CHCTRL_GATE_MODE_MSK, CVT_V1724_CHBKSZ_128K, CVT_V1724_CHBKSZ_16K, CVT_V1724_CHBKSZ_1K, CVT_V1724_CHBKSZ_256K, CVT_V1724_CHBKSZ_2K, CVT_V1724_CHBKSZ_32K, CVT_V1724_CHBKSZ_4K, CVT_V1724_CHBKSZ_512, CVT_V1724_CHBKSZ_512K, CVT_V1724_CHBKSZ_64K, CVT_V1724_CHBKSZ_8K, CVT_V1724_SET_ACQCTRL_ACQ_MODE, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRACE1.

BOOL cvt_V1724_set_adc_conf (  cvt_V1724_data *  p_data, UINT8  ch_msk, BOOL  dither_value, BOOL  clk_duty_stab_value, BOOL  randomize_value )

CH 0 Configuration register index CH 1 Configuration register index CH 2 Configuration register index CH 3 Configuration register index CH 4 Configuration register index CH 5 Configuration register index CH 6 Configuration register index CH 7 Configuration register index. < < < < < < < < Definition at line 1074 of file cvt_v1724.c. References cvt_set_bitmask_reg(), CVT_V1724_CH0_ADC_CONF_INDEX, CVT_V1724_CH1_ADC_CONF_INDEX, CVT_V1724_CH2_ADC_CONF_INDEX, CVT_V1724_CH3_ADC_CONF_INDEX, CVT_V1724_CH4_ADC_CONF_INDEX, CVT_V1724_CH5_ADC_CONF_INDEX, CVT_V1724_CH6_ADC_CONF_INDEX, CVT_V1724_CH7_ADC_CONF_INDEX, CVT_V1724_CHCONF_CLK_DUTY_STAB_MSK, CVT_V1724_CHCONF_DITHER_MSK, CVT_V1724_CHCONF_RND_MSK, CVT_V1724_MAX_CHANNEL, FALSE, cvt_V1724_data::m_common_data, and TRACE.

BOOL cvt_V1724_set_channel_offset (  cvt_V1724_data *  p_data, UINT8  ch_msk, UINT16  offset_value )

CH 0 DAC Data Configuration register index CH 1 DAC Data Configuration register index CH 2 DAC Data Configuration register index CH 3 DAC Data Configuration register index CH 4 DAC Data Configuration register index CH 5 DAC Data Configuration register index CH 6 DAC Data Configuration register index CH 7 DAC Data Configuration register index. < < < < < < < < Definition at line 1387 of file cvt_v1724.c. References CVT_V1724_CH0_DAC_CONF_INDEX, CVT_V1724_CH1_DAC_CONF_INDEX, CVT_V1724_CH2_DAC_CONF_INDEX, CVT_V1724_CH3_DAC_CONF_INDEX, CVT_V1724_CH4_DAC_CONF_INDEX, CVT_V1724_CH5_DAC_CONF_INDEX, CVT_V1724_CH6_DAC_CONF_INDEX, CVT_V1724_CH7_DAC_CONF_INDEX, CVT_V1724_CHDAC_SET_A_MSK, CVT_V1724_CHDAC_SET_B_MSK, cvt_V1724_get_channel_status(), CVT_V1724_MAX_CHANNEL, CVT_V1724_SET_CH_DAC_CONF, FALSE, TRACE, and TRUE.

BOOL cvt_V1724_set_channel_trigger (  cvt_V1724_data *  p_data, UINT8  ch_msk, UINT32  trigger_threshold, UINT32  threshold_samples )

CH 0 Threshold register index CH 1 Threshold register index CH 2 Threshold register index CH 3 Threshold register index CH 4 Threshold register index CH 5 Threshold register index CH 6 Threshold register index CH 7 Threshold register index CH 0 Over/Under Threshold Samples register index CH 1 Over/Under Threshold Samples register index CH 2 Over/Under Threshold Samples register index CH 3 Over/Under Threshold Samples register index CH 4 Over/Under Threshold Samples register index CH 5 Over/Under Threshold Samples register index CH 6 Over/Under Threshold Samples register index CH 7 Over/Under Threshold Samples register index. < < < < < < < < < < < < < < < < Definition at line 1503 of file cvt_v1724.c. References CVT_V1724_CH0_THRESHOLD_INDEX, CVT_V1724_CH0_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH1_THRESHOLD_INDEX, CVT_V1724_CH1_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH2_THRESHOLD_INDEX, CVT_V1724_CH2_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH3_THRESHOLD_INDEX, CVT_V1724_CH3_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH4_THRESHOLD_INDEX, CVT_V1724_CH4_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH5_THRESHOLD_INDEX, CVT_V1724_CH5_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH6_THRESHOLD_INDEX, CVT_V1724_CH6_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_CH7_THRESHOLD_INDEX, CVT_V1724_CH7_TIME_OVER_UNDER_THR_INDEX, CVT_V1724_MAX_CHANNEL, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, and TRACE.

BOOL cvt_V1724_set_dither_enable (  cvt_V1724_data *  p_data, UINT8  ch_msk, BOOL  dither_value )

CH 0 Configuration register index CH 1 Configuration register index CH 2 Configuration register index CH 3 Configuration register index CH 4 Configuration register index CH 5 Configuration register index CH 6 Configuration register index CH 7 Configuration register index. < < < < < < < < Definition at line 981 of file cvt_v1724.c. References cvt_set_bitmask_reg(), CVT_V1724_CH0_ADC_CONF_INDEX, CVT_V1724_CH1_ADC_CONF_INDEX, CVT_V1724_CH2_ADC_CONF_INDEX, CVT_V1724_CH3_ADC_CONF_INDEX, CVT_V1724_CH4_ADC_CONF_INDEX, CVT_V1724_CH5_ADC_CONF_INDEX, CVT_V1724_CH6_ADC_CONF_INDEX, CVT_V1724_CH7_ADC_CONF_INDEX, CVT_V1724_CHCONF_DITHER_MSK, CVT_V1724_MAX_CHANNEL, FALSE, cvt_V1724_data::m_common_data, and TRACE.

BOOL cvt_V1724_set_fp_trigger_out (  cvt_V1724_data *  p_data, BOOL  ext_trigger_enable, BOOL  sw_trigger_enable, UINT8  ch_trigger_enable_msk )

Setups the front panel triggering output parameters. < Enable CH 0 trigger bit < Enable CH 1 trigger bit < Enable CH 2 trigger bit < Enable CH 3 trigger bit < Enable CH 4 trigger bit < Enable CH 5 trigger bit < Enable CH 6 trigger bit < Enable CH 7 trigger bit Definition at line 865 of file cvt_v1724.c. References CVT_V1724_FPTRGEN_CH0_MSK, CVT_V1724_FPTRGEN_CH1_MSK, CVT_V1724_FPTRGEN_CH2_MSK, CVT_V1724_FPTRGEN_CH3_MSK, CVT_V1724_FPTRGEN_CH4_MSK, CVT_V1724_FPTRGEN_CH5_MSK, CVT_V1724_FPTRGEN_CH6_MSK, CVT_V1724_FPTRGEN_CH7_MSK, CVT_V1724_FPTRGEN_EXT_MSK, CVT_V1724_FPTRGEN_SW_MSK, and CVT_V1724_MAX_CHANNEL.

BOOL cvt_V1724_set_front_panel_IO (  cvt_V1724_data *  p_data, BOOL  use_TTL, BOOL  out_en, UINT8  dir_msk, CVT_V1724_FRONT_PANEL_IO_MODES  mode )

Sets front panel's IO. < General purpose IO < Programmed IO < Pattern mode Definition at line 1627 of file cvt_v1724.c. References CVT_V1724_FPIO_CTRL_OUT_DIS_MSK, CVT_V1724_FPIO_CTRL_TTL_MSK, CVT_V1724_FPIO_MODES_GPIO, CVT_V1724_FPIO_MODES_PATTERN, CVT_V1724_FPIO_MODES_PROGIO, CVT_V1724_FRONT_PANEL_IO_CTRL_INDEX, CVT_V1724_SET_FPIO_CTRL_DIR, CVT_V1724_SET_FPIO_CTRL_MODE, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_set_interrupt (  cvt_V1724_data *  p_data, UINT8  level, UINT32  status_id, UINT16  event_number )

Setups interrupt parameters. Setups the relevant parameters for interrupt usage. Parameters: p_data  Pointer to board data level  The interrupt level. status_id  The interrupt status id (interrupt vector). event_number  The number of events to get an interrupt (setting 0 interrupt feature is disabled). Returns: TRUE: Procedure successfully executed Definition at line 1189 of file cvt_v1724.c. References cvt_read_reg(), CVT_V1724_INT_EVENT_NUM_INDEX, CVT_V1724_INT_STATUS_ID_INDEX, CVT_V1724_SET_INT_LEVEL, CVT_V1724_VME_CONTROL_INDEX, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_set_MCST_CBLT (  cvt_V1724_data *  p_data, UINT8  address, MCST_CBLT_board_pos  pos )

Setups MCST/CBLT parameters for this board. Setups the relevant parameters for MCST/CBLT usage. Parameters: p_data  Pointer to board data. address  The MCST/CBLT address. pos  The board position into the MCST / CBLT chain: it must be a MCST_CBLT_board_pos identifier Returns: TRUE: Procedure successfully executed See also: MCST_CBLT_board_pos Definition at line 1982 of file cvt_v1724.c. References CVT_V1724_MCST_CBLT_ADD_CTRL_INDEX, CVT_V1724_MCST_CBLT_CTRL_DISABLED_BOARD, CVT_V1724_MCST_CBLT_CTRL_FIRST_BOARD, CVT_V1724_MCST_CBLT_CTRL_LAST_BOARD, CVT_V1724_MCST_CBLT_CTRL_MID_BOARD, CVT_V1724_SET_MCST_CBLT_ADD, CVT_V1724_SET_MCST_CBLT_CTRL, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, MCST_CBLT_board_disabled, MCST_CBLT_board_pos_first, MCST_CBLT_board_pos_last, MCST_CBLT_board_pos_mid, TRACE, TRACE1, and TRUE. Referenced by cvt_V1724_open().

BOOL cvt_V1724_set_readout_mode (  cvt_V1724_data *  p_data, BOOL  enable_bus_error, UINT32  BLT_event_number )

Setups data readout mode parameters. Setups the relevant parameters for data readout. Parameters: p_data  Pointer to board data enable_bus_error  Enable bus error: the module is enabled to generate a Bus error to finish a block transfer. BLT_event_number  The number of events to readout foreach BLT cycle. Returns: TRUE: Procedure successfully executed Definition at line 1280 of file cvt_v1724.c. References cvt_clear_bitmask_reg(), cvt_set_bitmask_reg(), CVT_V1724_BLT_EVENT_NUM_INDEX, CVT_V1724_VME_CONTROL_INDEX, CVT_V1724_VME_CTRL_BERR_ENABLE_MSK, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_set_trigger_mode (  cvt_V1724_data *  p_data, BOOL  falling_edge_enable, BOOL  trigger_in_enable, BOOL  trigger_out_enable, BOOL  ext_trigger_enable, BOOL  sw_trigger_enable, UINT8  ch_trigger_enable_msk, BOOL  trigger_overlap_enable, UINT32  post_trigger )

Setups the triggering mode parameters. < Enable CH 0 trigger bit < Enable CH 1 trigger bit < Enable CH 2 trigger bit < Enable CH 3 trigger bit < Enable CH 4 trigger bit < Enable CH 5 trigger bit < Enable CH 6 trigger bit < Enable CH 7 trigger bit Definition at line 444 of file cvt_v1724.c. References CVT_V1724_BROAD_CH_CLEAR_CTRL_INDEX, CVT_V1724_BROAD_CH_SET_CTRL_INDEX, CVT_V1724_BROAD_CHCTRL_TRG_IN_EN_MSK, CVT_V1724_BROAD_CHCTRL_TRG_OUT_EN_MSK, CVT_V1724_BROAD_CHCTRL_TRG_OUT_THR_MSK, CVT_V1724_BROAD_CHCTRL_TRG_OVERLAP_MSK, CVT_V1724_MAX_CHANNEL, CVT_V1724_TRGEN_CH0_MSK, CVT_V1724_TRGEN_CH1_MSK, CVT_V1724_TRGEN_CH2_MSK, CVT_V1724_TRGEN_CH3_MSK, CVT_V1724_TRGEN_CH4_MSK, CVT_V1724_TRGEN_CH5_MSK, CVT_V1724_TRGEN_CH6_MSK, CVT_V1724_TRGEN_CH7_MSK, CVT_V1724_TRGEN_EXT_MSK, CVT_V1724_TRGEN_SW_MSK, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, and TRACE.

BOOL cvt_V1724_software_reset (  cvt_V1724_data *  p_data  )

Performs a software reset. Writes a dummy value into SW_RESET_REGISTER register. Parameters: p_data  Pointer to board data Returns: TRUE: Procedure successfully executed Definition at line 1355 of file cvt_v1724.c. References CVT_V1724_SW_RESET_INDEX, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_software_trigger (  cvt_V1724_data *  p_data  )

Performs a software trigger. Sends a software trigger. Software triggers must be enabled Parameters: p_data  Pointer to board data Returns: TRUE: Procedure successfully executed See also: cvt_V1724_set_trigger_mode Definition at line 1705 of file cvt_v1724.c. References CVT_V1724_SW_TRIGGER_INDEX, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_start_acquisition (  cvt_V1724_data *  p_data, UINT8  ch_msk )

Starts the acquisition for the spcified channel mask. Parameters: p_data  Pointer to board data ch_msk  The mask of enabled channels Returns: TRUE: Procedure successfully executed Definition at line 640 of file cvt_v1724.c. References cvt_set_bitmask_reg(), CVT_V1724_ACQ_CONTROL_INDEX, CVT_V1724_ACQCTRL_START_MSK, CVT_V1724_CH_ENABLE_INDEX, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_stop_acquisition (  cvt_V1724_data *  p_data  )

Stops the acquisition. Parameters: p_data  Pointer to board data Returns: TRUE: Procedure successfully executed Definition at line 671 of file cvt_v1724.c. References cvt_clear_bitmask_reg(), CVT_V1724_ACQ_CONTROL_INDEX, CVT_V1724_ACQCTRL_START_MSK, FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE.

BOOL cvt_V1724_write_flash_page (  cvt_V1724_data *  p_data, const UINT8 *  page_buff, UINT32  page_index )

Writes a page into board's flash. Parameters: p_data  Pointer to board data. page_buff  The source page buffer: page_buff size must be V1724_FLASH_PAGE_SIZE bytes page_index  The page index (0 based index) to be written Returns: TRUE: Procedure successfully executed Definition at line 2057 of file cvt_v1724.c. References cvt_clear_bitmask_reg(), CVT_V1724_FLASH_DATA_INDEX, CVT_V1724_FLASH_EN_INDEX, CVT_V1724_FLEN_EN_MSK, CVT_V1724_FOP_PAGE_PROG_TH_BUF1, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, TRUE, and V1724_FLASH_PAGE_SIZE. Referenced by cvt_V1724_fw_upgrade().

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